Multi-Processor Data Transmission Coordination via Exchange Circuit
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Solution Overview
Problem
Coordinating data transmission from multiple processors within a multi-processor device to external destinations is challenging due to limited bandwidth, preventing simultaneous data transmission by all processors.
Innovation Solution
An exchange circuit is used to grant permission to processors to send data in a sequence, allowing each processor to specify the next processor for permission, enabling flexible data transfer patterns, including dynamic determination at runtime based on code execution branches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple processors simultaneously transmit data to external destinations, then data transmission throughput is maximized, but bandwidth limitation causes transmission conflicts and buffer overflow
Solution Approach 1:
The patent segments the data transmission process by assigning time slots to individual processors through permission messages from the exchange circuit. Each processor receives a permission message authorizing it to transmit during a specific time slot, dividing the transmission opportunity into discrete segments that prevent simultaneous access and resolve bandwidth conflicts.
Solution Approach 2:
The exchange circuit acts as an intermediary between multiple processors and external destinations. It receives permission requests from processors, manages the permission state, and coordinates transmission by sending permission messages to specific processors. This intermediary role enables controlled access to the shared external interface, preventing direct conflicts between processors.
2Reliability
If an exchange circuit controls data transmission permission sequentially, then bandwidth conflicts are avoided, but data transmission time is increased
Solution Approach 1:
The exchange circuit sends permission messages to processors in advance, before actual data transmission occurs. Processors receive their transmission authorization ahead of time and can prepare their data buffers and transmission queues. This preliminary coordination allows the actual data transmission to proceed efficiently when the time slot arrives, minimizing idle waiting time.
Solution Approach 2:
The permission grant sequence is made dynamic rather than fixed. Processors can specify which processor should receive permission next, allowing the system to adapt the permission sequence based on current workload conditions, data dependency requirements, and processor availability. This dynamic scheduling optimizes the balance between coordination overhead and transmission efficiency.
3Adaptability or versatility
If processors transmit data independently without coordination, then processing flexibility is maintained, but buffer overflow occurs at external interfaces
Solution Approach 1:
The exchange circuit implements feedback control by monitoring the permission state of each processor and adjusting permission grants accordingly. When a processor finishes transmitting its data, it signals the exchange circuit, which then sends permission messages to the next eligible processor. This feedback loop ensures that no processor overflows its buffer while maintaining the flexibility for processors to transmit independently when permitted.
Data Source
AI summary
A method for controlling the sending of data by a plurality of processors belonging to a device, the method comprising: sending a first message to a first processor of the plurality of processors to grant permission to the first processor of the plurality of processors to send a first set of data packets over at least one external interface of the device; receiving from the first processor, an identifier of a second processor of the plurality of processors; and in response to receipt of the identifier of the second processor, send a second message to the second processor to grant permission to the second processor to send a second set of data packets over the at least one external interface.