Multi-Processor Initialization Using Shared Memory Semaphores
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Solution Overview
Problem
Current multi-processor initialization methods in information handling systems require main memory initialization before processor initialization, leading to increased boot time and complexity due to the need for repeated execution of BIOS code during CPU power state changes, which can compromise memory stability if memory initialization is skipped.
Innovation Solution
Initializing multiple application processors prior to main memory initialization using shared memory and BIOS code state machines to communicate between the boot strap processor and other CPUs, allowing each processor to be identified and initialized independently without relying on main memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If main memory is initialized before processor initialization, then memory stability is ensured through semaphore protection, but boot time increases due to repeated BIOS code execution during CPU power state changes
Solution Approach 1:
The patent applies preliminary action by initializing processors before main memory, reversing the traditional sequence. The BSP (boot strap processor) initializes APs (application processors) using shared memory and semaphore mechanisms before main memory initialization, allowing CPU power state changes to occur earlier in the boot process without requiring repeated memory initialization
Solution Approach 2:
The patent uses shared memory as an intermediary between processors during initialization. The shared memory and semaphore protocols enable communication and coordination between BSP and APs without requiring main memory to be initialized first, allowing processors to exchange initialization information and maintain stability through the semaphore protection mechanism
2Reliability
If processor initialization occurs after main memory initialization, then semaphore protocols can protect memory accesses, but the system requires complex and less robust POST paths with repeated BIOS code execution
Solution Approach 1:
The patent applies preliminary action by establishing semaphore protection mechanisms in shared memory before main memory initialization. The BSP initializes semaphore structures in shared memory that will protect subsequent main memory accesses, allowing processor initialization to occur earlier while still ensuring memory protection is in place
Solution Approach 2:
The patent segments the memory protection mechanism into two phases: first, semaphore initialization in shared memory (small, dedicated memory space) occurs during processor initialization; second, main memory initialization occurs afterward with semaphores already in place to protect accesses. This segmentation allows processor initialization to proceed without requiring full main memory initialization
Data Source
AI summary
Methods and systems are disclosed for multi-processor initialization in an information handling system with two or more application processors (APs). One of the APs is configured to be a boot strap processor (BSP) that communicates with the other APs to initialize them prior to initialization of main memory. A basic input output system (BIOS) can be coupled to the APs and can be configured to hold BSP code and AP code used for initialization. APs are then discovered and initialized before the main memory of the system is initialized.