Multi-Processor Input Buffer Power Control via Chipset Signal Detection
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Solution Overview
Problem
Multi-processor systems face challenges in effectively integrating different hardware structures to reduce overall power consumption, as heterogeneous processors exhibit varying execution times and power consumption when performing the same tasks.
Innovation Solution
A dynamic power saving method where a chipset in a multi-processor system dynamically turns an input buffer on or off based on the presence of a control request signal from processors, reducing power consumption by disconnecting the input buffer when no data transmission is required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the input buffer is kept on continuously to ensure data transmission capability, then the system reliability is improved, but the power consumption increases
Solution Approach 1:
The input buffer's operational state is dynamically adjusted based on real-time bus activity detection. The buffer transitions between on and off states according to whether processors are actively requesting bus access, allowing the system to maintain reliability when needed while reducing power consumption during idle periods
Solution Approach 2:
The system implements a feedback mechanism where the chipset monitors bus request signals from processors and uses this information to control the input buffer's operational state. The detection of control request signals provides feedback that triggers the buffer to switch states, ensuring the buffer is active only when data transmission is actually required
2Use of energy by moving object
If the input buffer is turned off to reduce power consumption, then the energy efficiency is improved, but the data transmission capability deteriorates
Solution Approach 1:
The system performs preliminary detection of bus activity through control request signals before transitioning the input buffer to an off state. By monitoring processor requests in advance, the system ensures the buffer remains on when needed and can be safely turned off only when no transmission activity is anticipated, preventing data transmission disruptions
Solution Approach 2:
The input buffer operates in a dynamic state rather than a fixed state, switching between on and off based on actual system needs. This dynamic operation allows the buffer to maintain data transmission capability when processors are active while consuming minimal power during idle periods
Data Source
AI summary
A multi-processor system and a dynamic power saving method thereof are provided. The multi-processor system includes a plurality of processors and a chipset. Each of the processors has a plurality of standard bus request pins and a specific bus request pin, and the standard bus request pins of each processor are alternately connected to the standard bus request pins of other processors respectively. The chipset is coupled to the specific bus request pins of the processors for detecting a control request signal on the specific bus request pins. When the chipset detects the control request signal, the chipset turns on an input buffer connected with the processors so that the processors can access data through the input buffer. When the chipset does not detect the control request signal, the chipset turns off the input buffer.