Multi-Processor Semaphore Control for Parallel Task and Interrupt Handling

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Solution Overview

Problem

Conventional multi-processor systems face inefficiencies in parallel processing due to prolonged waiting times for tasks, as they cannot execute interruptions and task processing simultaneously, leading to decreased program efficiency.

Innovation Solution

A multi-processor system with a semaphore setting section, request determining section, and exclusive controlling section that allows unit processors to request and obtain semaphores efficiently, preventing unnecessary waiting states and enabling parallel processing by identifying and managing semaphore requests between tasks and interrupt handlers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a processor sets interruption prohibition to prevent interruptions during task execution, then task execution reliability is improved, but interruption response time increases and parallel processing efficiency decreases

Engineering Contradiction:
Improvetask execution reliabilityVSAvoidinterruption waiting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system divides the processor into multiple unit processors (first unit processor and second unit processor) that can operate independently. When the first unit processor needs to prohibit interruptions for task execution, the second unit processor remains available to handle interruptions, thus segmenting the functionality to resolve the contradiction between reliability and response time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A semaphore mechanism is introduced as an intermediary to coordinate between unit processors. The semaphore request determining section manages semaphore requests from multiple unit processors, allowing them to access shared resources in an ordered manner without requiring complete interruption prohibition, thereby reducing waiting time while maintaining execution reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a multi-processor system uses conventional single-processor interruption control methods, then software compatibility is improved, but parallel processing capability deteriorates

Engineering Contradiction:
Improvesoftware compatibilityVSAvoidparallel processing capability
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system dynamically assigns tasks and interruptions to different unit processors based on current system state and priority. The interruption controlling section can flexibly determine which unit processor handles interruptions, allowing the system to adapt conventional single-processor control methods while maintaining parallel processing capability through dynamic resource allocation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Multiple unit processors are designed with universal functionality to handle both task execution and interruption handling. The semaphore mechanism provides a universal interface for resource management across all unit processors, enabling software written for single-processor systems to run on multi-processor systems while utilizing parallel processing capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If multiple unit processors compete for the same semaphore, then resource exclusivity is improved, but processing efficiency deteriorates due to increased waiting states

Engineering Contradiction:
Improveresource exclusivityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary checks in the semaphore request determining section to identify which unit processor should obtain the semaphore before actual resource access. By determining the appropriate semaphore owner in advance and notifying waiting unit processors, the system reduces unnecessary waiting states while maintaining resource exclusivity through proactive resource allocation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7877753B2Multi-processor system and program for causing computer to execute controlling method of interruption of multi-processor system
Publication Date: 2011.01.25 138 EAST LCD ADVANCEMENTS LTD
  • US7877753B2 patent drawing
  • US7877753B2 patent drawing
  • US7877753B2 patent drawing

AI summary

A multi-processor system with a plurality of unit processors includes: a semaphore setting section for setting semaphores representing preferential right to the competing of resources to be able to be identified to correspond to each of a plurality of the resources; a semaphore request determining section for determining, whether when a first unit processor among said unit processors requests to obtain a semaphore that is set to said semaphore setting section, the request is for requesting a semaphore being obtained by the second unit processor; and an exclusive controlling section for making the request by the first unit processor wait when it is determined that said request is for requesting a semaphore being obtained, and permitting to obtain the requested semaphore when it is determined that said request is for requesting a semaphore other than the semaphore being obtained by the semaphore request determining section.