Multi-processor SoC for Automated Driving
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Solution Overview
Problem
Conventional automated driving systems rely on a single safety-rated system-on-chip (SoC) processor, which can be lower performing and experience processing bottlenecks when handling large amounts of data from various sensors, limiting their capability to generate and verify driving commands effectively.
Innovation Solution
A multi-processor architecture is implemented, separating command generation and safety functionality into different processors, with a high-performance command generation processor and a safety processor that verifies commands, and additional expansion modules to handle sensor data, providing design flexibility and reducing bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single safety-rated SoC processor is used, then safety functionality is ensured, but processing performance is limited and processing bottlenecks occur
Solution Approach 1:
The system is divided into multiple independent processors: a command generation processor for high-performance data processing and command generation, and a safety processor for verification and I/O gateway functions. This segmentation allows each processor to specialize in its function, resolving the contradiction between safety and performance by distributing tasks across multiple units rather than relying on a single processor to handle both safety and high-speed processing.
2Device complexity
If a single safety-rated SoC processor is used, then system simplicity is maintained, but processing bottlenecks occur when handling large amounts of sensor data
Solution Approach 1:
The system divides processing tasks across multiple processors to handle large volumes of sensor data from cameras, radar, and other sensors. The command generation processor handles high-performance data processing while the safety processor handles verification, preventing processing bottlenecks that would occur with a single processor while maintaining manageable system complexity through clear functional separation.
Solution Approach 2:
The safety processor acts as an intermediary between the high-performance command generation processor and the I/O channels. It receives commands from the command generation processor, verifies their safety, and then communicates with I/O channels, thereby mediating between performance-critical path and safety-critical path while adding I/O gateway functionality.
3Productivity
If high-performance processors are used for command generation, then processing speed is improved, but I/O channels may be absent or insufficient in quantity
Solution Approach 1:
The safety processor serves as an I/O gateway that compensates for insufficient I/O channels on the high-performance command generation processor. It provides additional I/O interfaces and communicates with sensors and actuators, thereby enhancing the system's adaptability to different sensing requirements without sacrificing the command generation speed provided by the high-performance processor.
Solution Approach 2:
The safety processor performs multiple functions: verifying safety of commands, providing I/O gateway functionality, and interfacing with various sensors and actuators. This multi-functionality allows the system to accommodate diverse sensing requirements and I/O needs while maintaining high command generation performance through the dedicated command generation processor.
Data Source
AI summary
A multi-processor architecture for automated driving systems can be used to improve performance and provide design flexibility. For example, a multi-processor architecture can be used to implement command generation and safety functionality in different processors. The command generation processor can be a high performing processor compared with the safety processor. The safety processor can verify the safety of commands output from the command generation processor and provide additional I/O channels that are typically absent on high performing processors. Additionally, processing of some sensor data can be moved to expansion modules with additional processors to reduce bottlenecks and provide design flexibility for systems with different sensing requirements.


