Multi-Profile Bump Interconnects for Warpage Compensation
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Solution Overview
Problem
In stacked semiconductor devices, the warpage of semiconductor chips leads to differences in bump height during flip-chip interconnection, causing connectivity issues due to varying bump formation positions and heights, which existing technologies have not adequately addressed.
Innovation Solution
A manufacturing method involving the formation of conductive bumps with varying radii and thicknesses, where the bump metal layer thickness is maintained smaller than the opening radius, allowing for uniform bump heights through reflow treatment, thereby ensuring consistent connection density and reducing size differences between bumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If flip-chip interconnection is applied to increase data transmission speed, then connection distance is reduced, but bump height uniformity deteriorates due to chip warpage
Solution Approach 1:
The patent applies different opening radii in different regions of the chip to compensate for warpage-induced bump height variations. Specifically, smaller opening radii are used in regions where bumps tend to be taller, and larger opening radii are used where bumps tend to be shorter, achieving uniform final bump heights across the chip surface.
Solution Approach 2:
The patent changes the geometric parameter (opening radius) of the bump formation structure to control the final bump height. By adjusting the opening radius, the bump metal layer thickness is controlled, which directly determines the final bump height after reflow treatment, thereby compensating for warpage effects.
2Length of moving object
If chip thickness is reduced to achieve downsizing, then device size is reduced, but chip warpage increases causing bump connection failures
Solution Approach 1:
The patent implements region-specific opening radii to address local variations in bump height caused by chip warpage. This local differentiation allows each bump to achieve the required height and connection reliability despite the overall chip thinning and associated warpage.
Solution Approach 2:
The patent performs preliminary adjustment of the opening radii before bump formation to pre-compensate for expected warpage effects. This preliminary design of the bump formation structure ensures that even after chip warpage occurs during subsequent processing, the final bump heights remain uniform and reliable.
3Manufacturing precision
If opening radius is reduced to control bump metal layer thickness, then bump height uniformity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs different opening radii for different bump regions, which requires a more complex lithography mask design and patterning process. This local differentiation enables precise control over bump metal layer thickness in each region, achieving uniform bump heights despite the increased manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures uniform bump heights and reduces size differences, enhancing connectivity robustness and enabling downsizing of electronic components by maintaining the bump metal layer thickness smaller than the opening radius, thus addressing the issue of varying bump heights and improving interconnection reliability.
Implementation Method 1
forming a bump by subjecting the bump metal layer to a reflow treatment
Data Source
AI summary
An electronic component in which an element is formed on a chip includes: a pad that is made of a conductive material and that is formed in a first bump formation region that is two-dimensionally arranged in center of one principle face and in a second bump formation region that is linearly arranged at peripheral border of the principle face; a passivation film that is formed on the principle face to cover portion except a formation position of the pad; a metal layer that is formed on the pad; and a bump that is made of a conductive material and that is formed on the metal layer by plating, wherein radius of the metal layer in the second bump formation region is smaller than radius of at least some of the metal layer in the first bump formation region.