Multi-Projector Headset Display Architecture

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Solution Overview

Problem

Current portable displays for augmented and virtual reality experiences often compromise on clarity, frame rate, or field of view to reduce power consumption, leading to a suboptimal user experience, particularly in scenarios requiring high-quality visuals and efficient computing.

Innovation Solution

A head-mounted display system utilizing a waveguide configuration with multiple projector integrated circuits, each comprising a warp engine, display driver, and backplane controller, optimized for performance and power efficiency, to provide high-quality images by coordinating rendering data and instructions across multiple projectors for each eye, enabling improved frame rates and field of view.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple projector integrated circuits are used with waveguide configuration, then display quality and field of view are improved, but device complexity increases

Engineering Contradiction:
Improvedisplay qualityVSAvoiddevice complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The display system is divided into multiple projector integrated circuits, with each circuit responsible for driving specific emitter arrays. This segmentation allows parallel processing of display data, improving frame rate and field of view while managing complexity through modular architecture where each projector IC is functionally independent but coordinated by a central processor

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional planar display architectures to a three-dimensional stacked configuration where emitter arrays are positioned at different depths and waveguide configurations route light paths in multiple dimensions. This spatial arrangement enables expanded field of view and improved display quality without proportionally increasing the planar footprint or overall device complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If high frame rate and field of view are achieved through multi-projector coordination, then user experience is improved, but power consumption increases

Engineering Contradiction:
Improveframe rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically coordinates multiple projector integrated circuits based on content requirements and user needs. Not all projectors need to operate at full capacity simultaneously, allowing the system to adjust power consumption dynamically while maintaining high frame rates when needed for immersive experiences

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Multiple projector integrated circuits share common resources including the waveguide configuration, central processor for rendering data, and power management infrastructure. This merging of shared components reduces the total power consumption compared to having separate complete display systems, while still enabling high frame rate operation through coordinated operation of the multiple projectors

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11743435B2Multi-projector display architecture
Publication Date: 2023.08.29 META PLATFORMS TECHNOLOGIES LLC
  • US11743435B2 patent drawing
  • US11743435B2 patent drawing
  • US11743435B2 patent drawing

AI summary

In an embodiment, a headset display device includes a central processor and multiple projector integrated circuits for eyes of a wearer of the headset display device. Each eye of the wear is associated with at least three projector integrated circuits. Each of the three projector integrated circuits is communicatively coupled to the central processor. Each projector integrated circuit includes a first integrated circuit including a light emitter array having monochrome light emitters of a single color, and a second integrated circuit coupled to the first integrated circuit. The second integrated circuit includes a graphics processor configured to generate transformed image data. The graphics processor is configured to provide the transformed image data to the first integrated circuit. The first integrated circuit is configured to output the transformed image data using the light emitter array.