Multi-Protocol Serial Nonvolatile Memory Interface Pin Reduction
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Solution Overview
Problem
Existing embedded systems require multiple IC pins to communicate with both I2C and SPI protocols, leading to inefficiencies and increased pin usage, especially when dealing with multiple devices.
Innovation Solution
A multiprotocol serial nonvolatile memory interface that operates using only four IC pins, capable of functioning as both SPI and I2C, allowing for efficient communication with up to two SPI devices and any number of I2C devices by repurposing chip select and clock lines for arbitration and data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate I2C and SPI interfaces are used to communicate with different protocols, then protocol compatibility is improved, but the number of IC pins required increases
Solution Approach 1:
The patent implements a universal interface that can operate in both I2C and SPI modes using the same physical pins. The interface includes mode selection logic that configures the pins to perform different functions based on the detected protocol type, allowing a single interface to replace what would traditionally require separate dedicated interfaces for each protocol
Solution Approach 2:
The patent combines the I2C and SPI interfaces into a single unified interface structure. The data lines, clock lines, and control logic are merged into one interface block that can dynamically switch between protocols, eliminating the need for separate physical interfaces and reducing the total pin count
2Adaptability or versatility
If multiple dedicated interfaces are implemented to support multiple devices with different protocols, then communication capability is improved, but pin usage increases
Solution Approach 1:
The unified interface uses the same physical pins to communicate with multiple devices supporting different protocols. The interface detects the protocol type for each device and configures the pins accordingly, allowing one set of pins to serve multiple communication purposes that would traditionally require separate pin sets
Solution Approach 2:
The interface employs dynamic configuration where the pin functions are not fixed but can change based on the communication requirements. The interface can dynamically switch between I2C and SPI modes, and dynamically assign pin functions based on which device is currently being communicated with, optimizing pin utilization
Data Source
AI summary
An electronic device including a multi-protocol serial nonvolatile memory interface is disclosed. The interface includes: a first line operative to perform functions of a first chip select line when the interface operates as a SPI of the electronic device; a second line operative to perform functions of a second chip select line when the interface operates as the SPI of the electronic device; a third line operative to perform functions of a clock line when the interface operates as either the SPI or an I2C interface of the electronic device, and a fourth line configured to perform functions of a mast-out-slave-in (MOSI) line and a master-in-slave-out (MISO) line when the interface operates as the SPI of the electronic device, the fourth line further operative to perform functions of a serial data line when the interface operates as the I2C interface of the electronic device.