Multi-PVT Frequency Prediction via Statistical Regression

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Solution Overview

Problem

Static timing analysis (STA) in integrated circuit design becomes inefficient due to increased complexity, requiring significant timing model characterization and longer turnaround times, often missing analysis of all operating conditions until late in the design cycle, which limits design optimization across various conditions.

Innovation Solution

A system and method that utilize a design management component to determine a trained model representing timing path properties and operating conditions based on vectorized data, combined with static timing analysis to predict operating conditions, enabling multi-operating condition frequency prediction for statically timed designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If static timing analysis is used to measure circuit timing, then measurement speed is improved, but analysis accuracy deteriorates due to increased circuit complexity

Engineering Contradiction:
Improvemeasurement speedVSAvoidtiming analysis accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent introduces a trained machine learning model as an intermediary between the circuit design and timing analysis. The model takes simplified timing model inputs and produces accurate timing predictions, mediating between the need for speed and the need for accuracy. This model was trained on detailed circuit characteristics, allowing it to capture complex timing behavior without requiring complex analysis procedures during actual timing measurement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If rigorous circuit simulation is used to measure timing, then measurement accuracy is improved, but computation time deteriorates

Engineering Contradiction:
Improvetiming measurement accuracyVSAvoidcomputation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent creates a simplified copy of the complex circuit timing behavior through the machine learning model. Instead of simulating the actual complex circuit interactions, the model learns from training data and provides timing predictions that replicate accurate results without the computational burden of full circuit simulation. This copying approach preserves accuracy while dramatically reducing computation time.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The machine learning model is trained in advance on detailed circuit characteristics and timing data. This preliminary training allows the model to store complex timing relationships in its parameters, so that during actual timing analysis, it can quickly retrieve and apply learned patterns without performing time-consuming calculations or simulations.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If static timing analysis is used for timing measurement, then analysis speed is improved, but completeness of operating condition analysis deteriorates

Engineering Contradiction:
Improveanalysis speedVSAvoidcoverage of operating conditions
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The machine learning model is designed to be universal across multiple operating conditions. It was trained on diverse timing characteristics from various operating scenarios, enabling it to accurately predict timing behavior across different process, voltage, and temperature conditions. This multi-functional capability allows a single model to handle multiple operating conditions that would traditionally require separate analysis procedures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11475194B1Multi-PVT frequency prediction (multi-PVT FP) for statically timed designs through statistical regression
Publication Date: 2022.10.18 CADENCE DESIGN SYST INC
  • US11475194B1 patent drawing
  • US11475194B1 patent drawing
  • US11475194B1 patent drawing

AI summary

Techniques improve integrated circuit design by employing multi-operating condition frequency prediction for statically timed designs through statistical analysis. A design management component (DMC) can determine a trained model representing timing path properties and operating conditions of agnostic timing paths based on an analysis of vectorized data that represents timing path information associated with the agnostic timing paths. DMC can perform statistical regression on the vectorized data to facilitate training the trained model. A static timing analysis (STA) component can perform STA on design information associated with the integrated circuitry design and determine an operating condition of a timing path of the integrated circuitry design based on the STA. DMC can predict or determine at least one other operating condition associated with the integrated circuitry design based on the operating condition and the trained model.