Multi-Queue Deskew Module for Data Stream Alignment

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Solution Overview

Problem

The design and implementation of receivers capable of deskewing multiple symbols per clock cycle are complicated by wire interconnects, leading to increased design time, power consumption, and die area in semiconductor chips, due to the complexity of routing and the higher number of wire interconnects required.

Innovation Solution

A communication system with a deskew module that includes data queues and a controller, which distributes and aligns symbols across multiple data streams, reducing the number and complexity of wire interconnects, and allowing for configuration to deskew one or two symbols per clock cycle, thereby simplifying the design and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the receiver is designed to deskew multiple symbols per clock cycle, then the communication throughput is improved, but the number of wire interconnects and design complexity increases

Engineering Contradiction:
Improvecommunication throughputVSAvoidwire interconnect complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The deskew circuit is divided into multiple independent deskew units, each handling one data stream. Each deskew unit contains multiple data queues that can be independently controlled, allowing the system to process multiple symbols per clock cycle while keeping each unit's internal wiring manageable and modular.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a time-multiplexed single-symbol deskew approach to a spatial parallelism approach by introducing multiple data queues within each deskew unit. This dimensional change from temporal to spatial processing enables multiple symbols to be deskewed simultaneously without proportionally increasing interconnect complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If the receiver deskews multiple symbols per clock cycle, then the data processing speed is improved, but the die area and power consumption increase

Engineering Contradiction:
Improvedata processing speedVSAvoiddie area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

By segmenting the deskew function into multiple independent units with shared control logic, the patent achieves parallel processing speed while avoiding the need for a fully replicated complex control structure, thus reducing overall die area compared to a non-modular implementation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple data queues within each deskew unit can be configured for different operating modes (single symbol or multiple symbols per clock cycle), making the circuit multi-functional and reducing the need for separate dedicated circuits for different throughput requirements, thereby optimizing die area utilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If the receiver deskews multiple symbols per clock cycle, then the communication efficiency is improved, but the design cycle time increases

Engineering Contradiction:
Improvecommunication efficiencyVSAvoiddesign cycle time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The modular segmented architecture allows for incremental design and verification of individual deskew units before integration, significantly reducing the overall design cycle time compared to designing a monolithic multi-symbol deskew circuit all at once.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent establishes a standardized modular deskew unit design that can be pre-verified and then replicated or configured for different throughput requirements, eliminating the need to redesign the entire system when changing data rates, thus reducing design cycle time.

Inventive Principle:
Principle #10Preliminary action

4Manufacturing precision

If the receiver deskews multiple symbols per clock cycle, then the data alignment capability is improved, but the number of wire interconnects increases

Engineering Contradiction:
Improvedata alignment precisionVSAvoidnumber of wire interconnects
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

By assigning dedicated data queues to each deskew unit and using a standardized interface protocol, the patent achieves precise data alignment across multiple data streams while limiting the growth of wire interconnects through modular repetition rather than full connectivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements selective deskewing where only the necessary number of queues and interconnects are activated for the current operating mode, avoiding the need to provision all possible interconnects even though the system has the capability to handle multiple symbols per clock cycle.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8161210B1Multi-queue system and method for deskewing symbols in data streams
Publication Date: 2012.04.17 MICROSEMI STORAGE SOLUTIONS US INC
  • US8161210B1 patent drawing
  • US8161210B1 patent drawing
  • US8161210B1 patent drawing

AI summary

A communication system includes a transmitter that transmits multiple data streams to a receiver in the communication system. Each of the data streams includes data and a skip ordered set. The receiver includes a deskew unit for each data stream, each of which includes multiple data queues. Each of the deskew units stores symbols of the data stream received by the deskew unit into the data queues of the data unit by distributing the symbols among the data queues. The deskew unit aligns data symbols across the data streams by deskewing symbols stored in the data queues of the deskew units based on skip ordered sets in the deskew units. Moreover, the receiver may deskew more than one symbol per clock cycle.