Multi-Rank Memory ODT State Broadcasting for Signal Integrity

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Solution Overview

Problem

In multi-rank memory systems, the variability in on-die termination (ODT) settings of signal lines among memory devices leads to differences in sensitivity and power consumption, degrading system performance due to unknown ODT settings among shared signal lines.

Innovation Solution

A method and system that broadcasts ODT state information among memory devices, allowing each device to adjust its ODT settings based on received information, ensuring consistent operation and optimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If each memory device independently sets ODT settings without knowing the ODT state of shared signal lines, then device complexity is reduced, but system performance degrades due to sensitivity and power consumption variability

Engineering Contradiction:
ImproveODT setting complexityVSAvoidsystem performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where ODT state information is broadcast from the memory controller to all memory devices, and each device adjusts its ODT settings based on this feedback. The memory controller monitors the ODT states of all ranks and broadcasts the appropriate ODT configuration to ensure consistent signal line termination across all memory devices, thereby improving system performance while maintaining manageable device complexity.

Inventive Principle:
Principle #23Feedback

2Reliability

If ODT settings are standardized across all memory devices, then system performance is improved, but device complexity increases due to ODT state information management

Engineering Contradiction:
Improvesystem performanceVSAvoidODT state information management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces the memory controller as an intermediary that manages ODT state information for all memory devices. Instead of each device independently managing ODT settings, the memory controller centralizes this function by monitoring ODT states, determining the appropriate configuration, and broadcasting it to all devices. This intermediary approach standardizes ODT settings across the system while avoiding the complexity of distributed ODT state management.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If ODT settings vary among multi-rank memory devices, then adaptability to different operating conditions is improved, but power consumption increases due to inconsistent termination states

Engineering Contradiction:
Improveoperating condition adaptabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies homogeneity by ensuring all memory devices operating on the same shared signal lines use identical ODT settings. The memory controller broadcasts a unified ODT state to all devices, ensuring consistent termination characteristics across the system. This homogeneous approach eliminates unnecessary power consumption variations while maintaining the ability to adapt to different operating conditions through centralized control.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS12020767B2Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device
Publication Date: 2024.06.25 SAMSUNG ELECTRONICS CO LTD
  • US12020767B2 patent drawing
  • US12020767B2 patent drawing
  • US12020767B2 patent drawing

AI summary

A method of operating memory devices disposed in different ranks of a multi-rank memory device and sharing a signal line includes receiving, in all of the memory devices included in the multi-rank memory device, on-die termination (ODT) state information of the signal line. The method further includes storing, in each of the memory devices of the multi-rank memory device, the ODT state information of the signal line in a mode register. The method further includes generating, in each of the memory devices of the multi-rank memory device, a control signal based on the ODT state information of the signal line stored in the mode register. The method further includes changing, in each of the memory devices of the multi-rank memory device, an ODT setting of the signal line in response to the control signal.