Multi-Region Gate Structures for Tuned MOSFET Threshold Voltages
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Solution Overview
Problem
The scaling down of MOS-FETs in semiconductor devices leads to deterioration in operational characteristics, necessitating improved electrical characteristics for high-performance semiconductor devices.
Innovation Solution
A semiconductor device with distinct gate structures featuring different threshold voltages is achieved by incorporating a dipole material in the high-k dielectric pattern of one gate structure and varying oxygen content in the high-k dielectric pattern of another, along with specific metal patterns and work-function layers to modulate threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOS-FETs are scaled down to increase integration density, then integration density is improved, but operational characteristics deteriorate
Solution Approach 1:
The patent applies local quality by creating different threshold voltages in different regions of the semiconductor device. Specifically, the first region has a first threshold voltage while the second region has a second threshold voltage, allowing each region to be optimized for its specific function. This enables high integration density while maintaining reliable operation in each region despite overall device scaling.
Solution Approach 2:
The patent changes physical parameters to resolve the contradiction. By adjusting the work function of the metal pattern and controlling oxygen content in the high-k dielectric layer, the threshold voltage is tuned without changing the physical dimensions or dopant concentrations. This allows operational characteristics to be optimized independently of the scaled-down geometry.
2Manufacturing precision
If dopant concentrations are altered to adjust threshold voltages, then threshold voltage control is improved, but fabrication complexity increases
Solution Approach 1:
Instead of changing dopant concentrations, the patent changes other parameters: the work function of the metal pattern and the oxygen content in the high-k dielectric layer. This achieves precise threshold voltage control while avoiding the complexity of modifying doping processes. The metal pattern work function is adjusted by selecting different metals or metal combinations, and oxygen content is controlled during high-k dielectric formation or through subsequent thermal treatments.
3Reliability
If dipole material is added to enhance threshold voltage tuning, then electrical characteristics are improved, but material degradation risk increases
Solution Approach 1:
The patent uses the high-k dielectric layer as an intermediary between the metal pattern and the semiconductor substrate. The dipole material is embedded within this stable high-k dielectric layer rather than being exposed at interfaces where degradation would occur. This protective intermediary structure allows the dipole material to enhance threshold voltage tuning while the high-k dielectric protects it from degradation mechanisms.
Solution Approach 2:
The patent employs composite material structures where the high-k dielectric layer contains dipole materials within a stable matrix. This composite approach combines the beneficial electrical characteristics of dipole materials with the structural stability and protection provided by the high-k dielectric host material, achieving both improved electrical characteristics and enhanced material stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the electrical characteristics of the semiconductor device by adjusting threshold voltages without altering dopant concentrations, facilitating efficient fabrication and reducing the likelihood of dipole material degradation.
Implementation Method 1
The first work-function layer includes a first metal element in the first metal pattern and a dipole material in the first high-k dielectric pattern
Implementation Method 2
An oxygen content in the second work-function layer is greater than an oxygen content in the second high-k dielectric pattern
Data Source
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Figure 3A
AI summary
A semiconductor device may include a semiconductor substrate including first (10) and second (20) regions, a first gate structure (GS1) on the first region, and a second gate structure (GS2) on the second region. Each of the first and second gate structures includes a metal pattern, a high-k dielectric pattern between the semiconductor substrate and the metal pattern, and a work-function layer between the high-k dielectric pattern and the metal pattern. The work-function layer (WF1a) of the first gate structure includes a first metal element in the metal pattern (WF1b) of the first gate structure and a dipole material in the high-k dielectric pattern (HK1) of the first gate structure, and the work-function layer (HK2b) and the high-k dielectric pattern (HK2a) in the second gate structure include a metal oxide material. In the second gate structure, an oxygen content in the work-function layer (HK2b) is higher than that in the high-k dielectric pattern (HK2a).