Multi-register Gather Instruction for Vector Data Shuffling

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Solution Overview

Problem

Current instruction set architectures require complex and time-consuming long chains of permutes and shuffles to gather values from different register elements, leading to inefficient performance in data parallel operations.

Innovation Solution

The introduction of a multi-register gather instruction that allows multiple source data elements from various vector registers to be stored into a single destination vector register using a single instruction, optimizing the process by eliminating the need for costly shuffles and permutes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional permutes and shuffles are used to gather values from different register elements, then the operation can be completed, but the instruction chain becomes complex and time-consuming

Engineering Contradiction:
Improvedata gathering efficiencyVSAvoidinstruction chain complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple permute and shuffle operations into a single gather instruction that can retrieve elements from multiple source registers simultaneously. This merging of operations eliminates the need for long chains of individual instructions, directly reducing both the complexity and execution time of data gathering operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gather instruction serves as a universal operation that can replace multiple specialized permute and shuffle instructions. By providing a single multi-functional instruction that handles various data gathering scenarios, the patent reduces instruction chain complexity while maintaining versatility in data manipulation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple permutes and shuffles are chained to gather data, then all required values can be collected, but execution time increases significantly

Engineering Contradiction:
Improvedata gathering throughputVSAvoidinstruction execution time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By merging multiple sequential permute and shuffle operations into a single parallel gather instruction, the patent eliminates the cumulative execution time of chained operations. The instruction executes in one cycle rather than requiring multiple sequential cycles, directly addressing the time loss issue.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gather instruction enables continuous data gathering from multiple registers in a single operation, eliminating the idle time and sequential dependencies inherent in chained permute operations. This continuity improves throughput by keeping the execution units busy without unnecessary delays.

Inventive Principle:
Principle #20Continuity of useful action

3Ease of operation

If traditional shuffle operations are used, then data can be rearranged, but programming complexity increases

Engineering Contradiction:
Improveprogramming simplicityVSAvoidinstruction sequence complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges multiple complex shuffle operations into a single gather instruction with simplified syntax. Programmers only need to specify source registers and element indices rather than chaining multiple shuffle instructions, dramatically reducing programming complexity while achieving the same data rearrangement效果.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If long chains of permutes are used, then data can be gathered from scattered locations, but execution port pressure and buffer usage increase

Engineering Contradiction:
Improvedata gathering capabilityVSAvoidbuffer usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The gather instruction consolidates multiple buffer operations into a single unified operation. By fetching data from multiple source registers simultaneously into a single destination register, the patent reduces the number of intermediate buffers required and minimizes execution port contention, directly addressing resource usage issues.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10180838B2Multi-register gather instruction
Publication Date: 2019.01.15 INTEL CORP
  • US10180838B2 patent drawing
  • US10180838B2 patent drawing
  • US10180838B2 patent drawing

AI summary

A processor fetches a multi-register gather instruction that includes a destination operand that specifies a destination vector register, and a source operand that identifies content that indicates multiple vector registers, a first set of indexes of each of the vector registers that each identifies a source data element, and a second set of indexes of the destination vector register for each identified source element. The instruction is decoded and executed, causing, for each of the first set of indexes of each of the vector registers, the source data element that corresponds to that index of that vector register to be stored in a set of destination data elements that correspond to the second set of identified indexes of the destination vector register for that source data element.