Multi-segment SEC Coding Segment Determination
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Solution Overview
Problem
Conventional memory design tools fail to accurately determine the number of segments for a multi-segment single error correcting (SEC) coding scheme, leading to adverse impacts on memory performance, storage efficiency, and error correction due to their inability to account for memory scrambling information.
Innovation Solution
The determination of a desirable number of segments for a multi-segment SEC coding scheme is based on memory scrambling information, which specifies various scrambling techniques, structures, and parameters, ensuring that each data word is divided into segments that satisfy both masked write segmentation and multi-bit upset size requirements, thereby ensuring effective error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional memory design tools are used to determine the number of segments for multi-segment SEC coding, then the design process is simple, but the determination of segment number is inaccurate leading to adverse impacts on memory performance, storage efficiency, and error correction
Solution Approach 1:
The patent introduces memory scrambling information as an intermediary element that bridges the gap between simple conventional design tools and accurate segment number determination. This scrambling information, which includes parameters and structures needed to implement scrambling techniques, enables precise calculation of physical distances between bits without requiring complex manual analysis, thus improving measurement precision while maintaining design process simplicity.
2Reliability
If the number of segments is increased to satisfy multi-bit upset size requirement, then error correction capability is improved, but memory performance and storage efficiency deteriorate
Solution Approach 1:
The patent applies parameter changes by using memory scrambling information to precisely calculate physical distances between bits, which allows for optimization of the segment number parameter. Instead of using a fixed or overly conservative segment number, the system dynamically determines the minimum necessary segments based on actual physical bit distances, thereby maintaining error correction capability while improving memory performance and storage efficiency.
Solution Approach 2:
The patent implements partial action by determining only the minimum necessary number of segments required to satisfy the multi-bit upset size requirement, rather than uniformly increasing segments across all memory configurations. This approach applies error correction precisely where needed based on calculated physical distances, avoiding unnecessary segmentation that would degrade performance and efficiency.
3Measurement precision
If memory scrambling information is incorporated into the segment determination process, then the accuracy of segment number determination is improved, but the complexity of the design tool increases
Solution Approach 1:
The patent applies preliminary action by pre-defining memory scrambling information, including scrambling techniques, parameters, and structures, before the segment number determination process. This preprocessing step organizes the complex scrambling data into a usable format that can be easily referenced during segment calculation, thereby improving determination accuracy while minimizing the additional complexity introduced to the design tool.
Data Source
AI summary
A desirable number of segments for a multi-segment single error correcting (SEC) coding scheme is determined based on scrambling information for a memory. The desirable number of segments can be the minimum number of segments required to satisfy a masked write segmentation requirement and a multi-bit upset size requirement. In one aspect, the memory scrambling information can specify the different scrambling techniques employed by the memory (e.g., Input-Output (IO) cell scrambling, column scrambling, column twisting, strap distribution, etc.). Based on the scrambling information, a mapping between the logical structure and physical layout for the memory can be derived. The mapping can be used to determine the least number of segments needed to satisfy the masked write requirement and the multi-bit upset size requirement.