Multi-sided Cooling Semiconductor Package With Metal Preforms

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Solution Overview

Problem

Conventional double-side cooling semiconductor packages face issues with thermal stress, contamination from solder overflow, and mechanical stress due to uneven solder joints, which can lead to chip tilting and reduced robustness.

Innovation Solution

A multi-sided cooling semiconductor package design that incorporates first and second substrates with metal preforms between the substrates and semiconductor chips, allowing direct contact with metal layers and eliminating the need for spacers and bonding wires, enhancing thermal management and robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If solder pastes are used to connect semiconductor chips to substrates, then electrical and physical connection is achieved, but contamination occurs due to solder overflow and uneven solder joints cause chip tilting

Engineering Contradiction:
Improveconnection reliabilityVSAvoidcontamination and chip tilting
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Metal preforms are introduced as intermediary elements between the solder paste and semiconductor chips. The preforms serve as a buffer that receives the molten solder, preventing direct contact between excessive solder and the chip, thereby eliminating contamination and tilting issues while maintaining reliable electrical and mechanical connection

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The metal preforms are placed in advance at the bonding locations before soldering. These preforms act as a cushioning layer that absorbs and distributes the molten solder, preventing overflow onto the chip and ensuring uniform solder distribution before the chip is bonded, thus preventing contamination and tilting

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If spacers are used between semiconductor chips and upper substrate, then connection is achieved, but thermal stress is induced due to different thermal expansion coefficients of various components

Engineering Contradiction:
Improveconnection reliabilityVSAvoidthermal stress
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The invention removes the spacer component entirely from the package structure. By eliminating the spacer, the source of thermal expansion mismatch and associated thermal stress is removed, while the metal preforms provide the necessary mechanical support and electrical connection without introducing thermal stress

Inventive Principle:
Principle #2Taking out (Extraction)

3Temperature

If conventional double side cooling structure is used, then heat dissipation is achieved, but thermal stress and contamination issues occur

Engineering Contradiction:
Improveheat dissipationVSAvoidthermal stress
Core Design Contradiction:
TemperatureVSStress or pressure

Solution Approach 1:

Metal preforms are introduced as intermediary elements that improve the thermal interface between the substrate and semiconductor chips. These preforms provide better thermal contact and distribution, enhancing heat dissipation while simultaneously preventing solder-related contamination and reducing thermal stress through their mechanical cushioning effect

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively alleviates thermal stress, prevents contamination, and improves chip alignment, resulting in enhanced heat dissipation and package robustness while maintaining compatibility with existing processes and reducing costs.

Implementation Method 1

which dissipates heat as generated by semiconductor chips 100 through lower and upper substrates 102 and 104

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11380646B2Multi-sided cooling semiconductor package and method of manufacturing the same
Publication Date: 2022.07.05 DIODES TAIWAN LLC
  • US11380646B2 patent drawing
  • US11380646B2 patent drawing
  • US11380646B2 patent drawing

AI summary

A multi-sided cooling semiconductor package includes a first substrate, a second substrate, semiconductor chips disposed between the first substrate and the second substrate, and first metal preforms. The first substrate includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The second substrate also includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The first metal preforms are disposed between the first substrate and the semiconductor chips and between the second substrate and the semiconductor chips. A first part of the first metal preforms is in direct contact with the upper metal layer of the first substrate, and a second part of the first metal preforms is in direct contact with the lower metal layer of the second substrate.