Multi-Stage ADC Circuit for Low-Cost High-Bit Conversion
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) with low bit width offer low accuracy due to cost constraints, leading to suboptimal conversion of analog signals in applications requiring high sensitivity and waveform quantification.
Innovation Solution
A multi-stage analog-to-digital conversion circuit comprising voltage division circuits and control calculation circuits that enhance bit width by sequentially converting analog signals through multiple stages, using algorithms like A-law 13 polyline to improve accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ADC with low bit width is used to convert analog signals, then cost is reduced, but accuracy of converted digital signals becomes low
Solution Approach 1:
The patent divides the analog-to-digital conversion process into multiple stages: a first conversion circuit performs initial conversion to obtain a first digital signal, while voltage division circuits divide the analog signal into multiple portions that are converted by second conversion circuits to obtain second digital signals. These multiple conversion results are then combined through control calculation circuits to achieve high-bit-width conversion with improved accuracy while using only low-bit-width ADC components.
Solution Approach 2:
The patent introduces voltage division circuits as intermediary components between the analog signal source and the conversion circuits. These voltage division circuits divide the input analog signal into multiple portions (first-stage and second-stage analog signals) that are then processed by separate conversion circuits. This intermediary division enables the system to achieve higher effective bit width by combining multiple low-bit-width conversion results.
2Measurement precision
If ADC with high bit width is used to convert analog signals, then sampling accuracy is improved, but cost increases exponentially
Solution Approach 1:
The patent segments the high-precision conversion task into multiple low-bit-width conversion operations. Instead of using a single high-bit-width ADC that would be expensive, the system uses multiple low-bit-width ADCs (first conversion circuit and second conversion circuits) that each perform simpler conversion tasks. The results are then combined through control calculation circuits to achieve the equivalent of high-bit-width conversion accuracy at lower cost.
Solution Approach 2:
The patent merges the conversion results from multiple low-bit-width conversion circuits to achieve high-bit-width conversion accuracy. The control calculation circuits combine the first digital signal from the first conversion circuit with the second digital signals from the second conversion circuits through calculation operations, effectively merging multiple low-precision measurements into a single high-precision result.
Data Source
AI summary
Disclosed in embodiments of the present disclosure are an analog-to-digital conversion circuit, an integrated chip, a display device, and an analog-to-digital conversion method. A first conversion circuit converts an original analog signal to obtain a digital signal of a first bit width; a voltage division circuit performs voltage division on a first-level analog signal to obtain a second-level analog signal, the first-level analog signal being an original analog signal or a second-level analog signal obtained by a previous voltage division circuit adjacent to the voltage division circuit; a second conversion circuit converts the received second-level analog signal according to a preset algorithm to obtain a second digital signal of a second bit width; and a control calculation circuit obtains a target digital signal of a third bit width according to the first digital signal and the second digital signal.