Multi-Stage Cascade Arbiter for Fair Packet Routing

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Solution Overview

Problem

Existing network processing devices face inefficiencies in packet routing due to unfair and inefficient arbitration schemes, where high-priority packets may delay lower-priority packets accessing output ports.

Innovation Solution

A multi-stage comparator system with Arithmetic Logic Units (ALUs) and round-robin pointers is used to determine winners among input ports competing for output ports, ensuring fair access through multiple arbitration stages and selecting an ultimate winner.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional arbitration schemes are used to determine packet transmission order, then high-priority packets can be transmitted quickly, but lower-priority packets experience long wait times and unfair access to output ports

Engineering Contradiction:
Improvepacket transmission speedVSAvoidwait time for lower-priority packets
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The arbitration process is divided into multiple stages (first arbitration stage, second arbitration stage) with each stage handling specific comparison tasks. The multi-stage tournament structure segments the single complex arbitration into manageable rounds, allowing systematic evaluation of all input ports while maintaining efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbitration is extended from a single-dimension priority comparison to multi-dimensional evaluation including enable signals, priority values, and data weight. The tournament structure adds a temporal dimension with multiple arbitration stages, creating a comprehensive selection process that considers both priority and fairness across different dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If single-stage arbitration is used to select winning input ports, then the arbitration process is simple and fast, but it cannot ensure fair access for all input ports competing for output ports

Engineering Contradiction:
Improvearbitration efficiencyVSAvoidfairness of packet access
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The arbitration process is divided into multiple stages (first arbitration stage, second arbitration stage) with each stage handling specific comparison tasks. The multi-stage tournament structure segments the single complex arbitration into manageable rounds, allowing systematic evaluation of all input ports while maintaining efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbitration system dynamically adapts to different input conditions by using enable signals to activate or deactivate specific input ports in each arbitration stage. The system can adjust which ports participate in comparisons based on current traffic conditions, priority levels, and buffer states, making the arbitration process both fair and efficient.

Inventive Principle:
Principle #15Dynamics

3Productivity

If high-priority packets are always given access to output ports first, then overall network throughput is improved, but lower-priority packets may be starved of access opportunities

Engineering Contradiction:
Improvenetwork throughputVSAvoidaccess guarantee for all packets
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The arbitration system uses feedback from enable signals, priority values, and data weight measurements to dynamically adjust arbitration decisions. The round-robin pointer provides feedback-based rotation of access opportunities, ensuring that after high-priority packets are served, lower-priority packets receive fair access in subsequent arbitration cycles.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes arbitration parameters (enable signals, priority values, data weight) based on current network conditions and packet characteristics. By dynamically adjusting these parameters across multiple arbitration stages, the system can prioritize throughput-critical packets while ensuring reliability through guaranteed access opportunities for all packet types.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7586927B1Multistage cascade arbiter
Publication Date: 2009.09.08 DELL MARKETING CORP
  • US7586927B1 patent drawing
  • US7586927B1 patent drawing
  • US7586927B1 patent drawing

AI summary

Multiple comparators compare the enable and priority values for multiple inputs and select a winner from one of the inputs. Multiple comparator stages each include one or more of the comparators. Each comparator stage selects winners from the outputs of a preceding comparator stage. The overall winners are those inputs that are winners in each comparator stage. If there are multiple overall winners, a second arbitration is preformed to identify an ultimate winner.