Multi-stage Compilation for Vector Computations

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Solution Overview

Problem

Software applications compiled in statically typed languages like C++ or Rust often fail to take advantage of hardware upgrades without recompilation and redeployment, leading to suboptimal operation and slower adoption of system upgrades.

Innovation Solution

Implementing a multi-stage automatic compilation process that regenerates compilation output based on hardware and software changes, using a unified programming model like ONEAPI to ensure efficient execution on heterogeneous hardware, eliminating the need for recompilation and redeployment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the application is compiled once during development and deployed without recompilation, then the deployment process is simple and fast, but the application cannot take advantage of subsequent hardware upgrades and instruction set enhancements

Engineering Contradiction:

Improveadaptability to hardware upgradesVSAvoidtime for recompilation and redeployment

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments the compilation process into two distinct stages: a development-stage compilation that produces a portable binary with intermediate representation data, and a deployment-stage compilation that optimizes the binary for specific hardware. This segmentation allows the application to be compiled once during development but still adapted to upgraded hardware through the deployment-stage compilation triggered by capability change detection.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by embedding intermediate representation data and capability detection mechanisms into the portable binary during the development-stage compilation. This preliminary preparation enables the deployment system to automatically detect hardware capability changes and trigger optimization compilations without requiring developer intervention, thus resolving the contradiction between simple deployment and hardware adaptability.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If the application is recompiled and redeployed to take advantage of system upgrades, then the application performance is optimized, but the enablement of new software features is slower and developer workflow is disrupted

Engineering Contradiction:

Improveperformance optimizationVSAvoidsoftware feature enablement speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent implements self-service by enabling the deployed application to automatically detect capability changes in the execution environment and trigger its own optimization compilation without requiring developer intervention. The system monitors for hardware upgrades and instruction set enhancements, then autonomously recompiles and redeploys the optimized binary, thus maintaining performance optimization while accelerating software feature enablement.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent incorporates feedback mechanisms that monitor the execution environment for capability changes. When hardware upgrades or instruction set enhancements are detected, the system feeds this information back to trigger a deployment-stage compilation. This feedback loop ensures the application automatically adapts to new hardware capabilities, resolving the contradiction between performance optimization and rapid feature enablement.

Inventive Principle:

Principle #23Feedback

3Power

If the application uses hardware-specific optimization, then execution performance is improved, but the application portability across different hardware platforms is reduced

Engineering Contradiction:

Improveexecution performanceVSAvoidplatform portability

Core Design Contradiction:

PowerVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by creating a two-stage compilation system where the application binary is initially generated with portable intermediate representation data, then dynamically optimized for specific hardware platforms at deployment time. The deployment-stage compilation adapts the binary to exploit hardware-specific features and instruction sets, achieving high execution performance while maintaining the ability to port the application across different platforms through the portable intermediate representation.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11934809B2Multi-stage automatic compilation for vector computations in applications

Publication Date: 2024.03.19 INTEL CORP

AI summary

Systems, apparatuses and methods may provide for developer stage technology that embeds binary code into an application binary file, wherein the binary code corresponds to vector functions and non-vector functions in statically typed source code, and generates intermediate representation (IR) data, wherein the intermediate representation data corresponds to the vector functions in the statically typed source code. Additionally, the developer stage technology embeds the IR data in the application binary file. Moreover, deployment stage technology may generate a first compilation output based on the application binary file and detect a capability change in an execution environment associated with the first compilation output. The deployment stage technology may also generate, in response to the detected capability change, a second compilation output based on the first compilation output.