Multi-stage Counter Tables for Memory Optimization

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Solution Overview

Problem

Counter tables in computer systems become increasingly unwieldy and memory-intensive as systems become more complex, leading to inefficient memory allocation and increased costs, power usage, and size constraints, especially in integrated devices where memory space is limited.

Innovation Solution

Implementing a dynamic memory allocation system for counter tables using a pool of lower-level and upper-level counters, where lower-level counters can be dynamically enlarged by referencing upper-level counters, allowing for a more efficient use of memory by accommodating a wider range of values as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If counter tables are enlarged to accommodate more complex computer systems, then the ability to collect statistics and route network traffic is improved, but memory usage and device size increase

Engineering Contradiction:
Improvecounter table functionalityVSAvoidmemory usage
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The counter table is divided into multiple stages, with each stage containing a subset of counters. This segmentation allows the system to process and count events in a distributed manner across multiple memory locations, reducing the need for a single large counter table and improving memory utilization efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a multi-dimensional counter table structure with multiple stages and multiple counters per stage. This dimensional expansion allows the system to track events more efficiently by distributing counters across different stages, thereby reducing overall memory requirements while maintaining enhanced functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If counter tables are enlarged to handle more events, then event counting capability is improved, but device complexity increases

Engineering Contradiction:
Improveevent counting capabilityVSAvoidcounter table structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The counter table is segmented into multiple stages, with each stage handling a portion of the event counting workload. This segmentation distributes the complexity across manageable units while collectively providing enhanced event counting capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The multi-stage counter table structure enables dynamic event distribution across different stages. Events can be routed to appropriate stages based on their characteristics, allowing the system to adaptively handle varying event loads without requiring a monolithic complex structure.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If more memory is allocated to counter tables, then storage capacity is improved, but power consumption increases

Engineering Contradiction:
Improvememory storage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by stationary object

Solution Approach 1:

Each stage of the counter table is designed with localized counting functionality, allowing only the necessary memory resources to be activated for specific counting tasks. This local quality approach reduces overall power consumption by avoiding the continuous operation of entire large memory structures.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The segmented multi-stage structure allows the system to activate only the memory stages needed for current operations, reducing power consumption compared to a single large counter table that would require full memory allocation and continuous operation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10817177B1Multi-stage counters
Publication Date: 2020.10.27 AMAZON TECH INC
  • US10817177B1 patent drawing
  • US10817177B1 patent drawing
  • US10817177B1 patent drawing

AI summary

Disclosed herein are methods and apparatuses related to the use of counter tables. A counter table can comprise a plurality of lower-level counters and an upper-level counter. A range of values capable of being represented by a lower-level counter from the plurality of lower-level counters can be enlarged by associating the lower-level counter with the upper-level counter. A counter table can be associated with a network device.