Multi-Stage Gate Ramping Circuit for Power Supply Loss Reduction
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Solution Overview
Problem
Conventional voltage ramping circuits in synchronous buck converters face inefficiencies due to QRR losses, switching losses, and dead time between the deactivation of the synchronous switch and activation of the control switch, which affect the overall performance of the switching power supply.
Innovation Solution
A multi-stage ramping approach is implemented in the drive control circuit, utilizing three parallel circuit paths to pre-charge, slow-charge, and fast-charge the gate node of the control switch, based on feedback voltage, to reduce dead time, QRR losses, and switching losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a conventional single-stage ramping circuit is used to charge the gate node, then the circuit complexity is low, but the dead time between switch deactivation and activation is excessive
Solution Approach 1:
The gate charging process is segmented into three distinct stages using three parallel circuit paths: a first path for initial charging, a second path for intermediate charging, and a third path for final charging. Each path is activated at different times through control switches, allowing the gate voltage to be ramped up in controlled increments rather than a single long charging phase, thereby reducing dead time while maintaining manageable circuit complexity
Solution Approach 2:
The first circuit path pre-charges the gate node to an initial voltage level before the main switching operation begins. This preliminary action ensures that the gate is already partially charged when the switching sequence starts, reducing the total time required for complete gate activation and thereby reducing dead time
2Loss of time
If a fast charging path is used to quickly activate the control switch, then the dead time is reduced, but switching losses and QRR losses increase
Solution Approach 1:
The charging process is divided into three segments with progressively faster charging rates. The first path provides slow initial charging to prepare the gate without causing excessive current spikes. The second path provides intermediate charging speed. The third path provides fast charging only when needed. This segmentation allows the system to achieve quick activation when necessary while avoiding the energy losses associated with consistently fast charging
Solution Approach 2:
The charging rate is made dynamic by selectively activating different circuit paths based on the charging stage. The control switches dynamically connect different charging paths to the gate node, transitioning from slow charging to fast charging as needed. This dynamic approach optimizes the balance between reducing dead time and minimizing switching losses
3Loss of energy
If multiple circuit paths are used for multi-stage ramping, then switching losses are reduced, but the device complexity increases
Solution Approach 1:
Multiple circuit paths are merged in parallel configuration, all connecting to the same gate node. This merging approach allows the system to utilize multiple charging paths simultaneously or sequentially without requiring separate gate nodes or complex isolation circuits. The parallel structure reduces switching losses by providing multiple charging options while keeping the overall circuit complexity manageable through shared components
Solution Approach 2:
Each circuit path is designed with multi-functionality, where the same path can serve different purposes at different times. The control switches enable each path to be selectively activated based on charging requirements. This universality allows the circuit to achieve reduced switching losses through multiple paths without proportionally increasing complexity, as each component serves multiple functions across different operating stages
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-stage ramping technique effectively reduces dead time, QRR losses, and switching losses in the switching power supply, enhancing the efficiency and performance of the power supply circuit.
Implementation Method 1
the voltage ramping circuit 240 charges a gate node 398 of the control switch 150 during a first time segment in accordance with a first charging rate
Implementation Method 2
charges the gate node 398 of the control switch 150 in accordance with a first charging rate
Implementation Method 3
the voltage ramping circuit 240 charges the gate node 398 of the control switch 150 during a second time segment in accordance with a second charging rate faster than the first charging rate
Data Source
AI summary
A power supply circuit includes a control switch, a synchronous switch, an inductor, and a voltage ramping circuit. A common node in the power supply serially connects the control switch to the synchronous switch. The common node is further coupled to the inductor that supplies current to a load based on switching the control switch and the synchronous switch to respective ON/OFF and OFF/ON states. The voltage ramping circuit generates and controls ramping of a gate voltage of the control switch based at least in part on a magnitude of a feedback voltage received on a circuit path from the common node. The multi-stage ramping of a switch control voltage reduces one or more of the following: i) QRR losses, ii) switching losses, and/or iii) a dead time of the power supply.