Multi-Stage Via Structure for Lower-Resistance Semiconductor Contacts
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Solution Overview
Problem
The challenge in forming high aspect ratio vias in stacked transistor structures is the high resistance due to small bottom critical dimensions, leading to performance issues.
Innovation Solution
The formation of multi-stage vias, where the first stage is processed from the frontside and the second stage from the backside, addresses the resistance issues by providing larger critical dimensions at the bottom, thereby reducing resistance and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single-stage vias are formed in stacked transistor structures, then the via connects frontside and backside, but the bottom critical dimension becomes small leading to high resistance
Solution Approach 1:
The via formation process is segmented into multiple stages: first forming a via from the frontside to a intermediate depth, then forming a second stage from the backside to connect with the first stage. This segmentation allows each stage to have optimized dimensions, with the bottom stage having larger critical dimensions that reduce resistance while the top stage provides proper alignment and connection to frontside structures.
2Area of stationary object
If via bottom critical dimension is reduced for scaling, then area is reduced, but resistance increases leading to performance issues
Solution Approach 1:
Different stages of the via have different dimensional characteristics optimized for their specific functions. The bottom stage has larger critical dimensions optimized for low resistance and robust connection to backside structures, while the top stage has smaller dimensions optimized for alignment with frontside transistor structures. This local differentiation of quality allows simultaneous optimization of both area and resistance.
3Object-affected harmful factors
If multi-stage vias are formed with larger bottom critical dimensions, then resistance is reduced, but process complexity increases
Solution Approach 1:
Instead of forming the entire via from one side (traditional approach), the process inverts by forming portions of the via from opposite sides (frontside and backside). This inversion allows independent optimization of each stage's dimensions and reduces the complexity of achieving precise dimensional control in a single high-aspect-ratio via formation process.
Data Source
AI summary
A method includes forming a first stage of a multi-stage via in a semiconductor structure utilizing processing from a first side of the semiconductor structure, the first stage of the multi-stage via having a first surface and a second surface opposite the first surface. The method also includes forming a second stage of the multi-stage via utilizing processing from a second side of the semiconductor structure, the first stage of the multi-stage via having a first surface and a second surface opposite the first surface. The first surface of the first stage of the multi-stage via is proximate the first side of the semiconductor structure, the first surface of the second stage of the multi-stage via is proximate the second side of the semiconductor structure, and the second surface of the first stage of the multi-stage via abuts the second surface of the second stage of the multi-stage via.