Multi-State Memory Programming via Concurrent Bit Line Biasing
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Solution Overview
Problem
Multi-state non-volatile memory devices face challenges in programming and verifying data states, which takes longer compared to binary devices, due to the complexity of identifying multiple threshold voltage ranges for storing multiple data states.
Innovation Solution
A method for concurrently programming memory cells from intermediate states to target data states, where memory cells on even and odd bit lines are programmed into intermediate states from an erased state and then to target states, utilizing a controller to manage bit line biases and sense amplifier circuits to verify threshold voltages efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-state non-volatile memory is implemented to store more data than binary memory, then storage capacity is improved, but programming and verification time increases
Solution Approach 1:
The patent segments the programming process into multiple phases, where different bit line voltage levels are applied to program different data states in sequence. This segmentation allows the memory controller to systematically manage the complex multi-state programming process by dividing it into manageable steps, each targeting specific threshold voltage ranges for different data states.
Solution Approach 2:
The patent employs periodic action through iterative programming and verification cycles. Multiple programming pulses are applied with intermediate verification steps to ensure data integrity. This periodic approach allows the system to progressively program memory cells to different threshold voltage ranges while verifying each state, thereby reducing total programming time compared to sequential methods.
2Quantity of substance
If multiple threshold voltage ranges are identified for multi-state memory, then data storage density is improved, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by using a single bit line control mechanism to program multiple data states. The same bit line infrastructure is used across all memory cells, but different voltage levels on this common bit line enable programming of different threshold voltage ranges, thereby storing multiple data states without requiring separate control lines for each state.
Solution Approach 2:
The patent utilizes parameter changes by varying the bit line voltage level to program different data states. Instead of changing the physical structure or adding complex control circuitry, the system changes the electrical parameter (voltage level) on the bit line to selectively program memory cells to different threshold voltage ranges, thereby encoding multiple data states through parameter variation.
3Productivity
If concurrent programming of even and odd bit lines is implemented, then programming speed is improved, but signal interference may increase
Solution Approach 1:
The patent applies local quality by differentiating the treatment of even and odd bit lines. Different voltage levels are applied to even versus odd bit lines during programming operations. This local differentiation allows concurrent programming of adjacent memory cells while maintaining sufficient voltage margins to prevent interference, as each bit line operates with optimized voltage characteristics suited to its specific programming requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the programming time for multi-state non-volatile memory by allowing simultaneous programming and verification across multiple data states, improving the efficiency and speed of data storage operations.
Implementation Method 1
A charge-trapping material can be used in non-volatile memory devices to store a charge which represents a data state
Implementation Method 2
identifying multiple, distinct allowed ranges of threshold voltages. Each distinct range of threshold voltages corresponds to a data state
Data Source
AI summary
A method is provided for programming a non-volatile memory. The method includes programming memory cells for even bit lines by programming the memory cells into a plurality of intermediate data states from an erased state, and for each of the intermediate data states, concurrently programming the memory cells to a plurality of target data states. The method also includes programming memory cells for odd bit lines by programming the memory cells into the plurality of intermediate data states from an erased state, and for each of the intermediate data states, concurrently programming the memory cells to the plurality of target data states.