Multi-state Memory Programming Reducing Buffer Overhead
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Solution Overview
Problem
Existing foggy/fine programming techniques for multi-bit per cell NAND flash memory require large data buffering in the controller, leading to increased memory requirements and processing burdens, especially in high-performance systems like those using quadruple-level cell (QLC) flash storage systems, where the high bit error rate during the foggy state can overwhelm error-correcting codes.
Innovation Solution
The technology enables foggy programming to be readable by the controller by storing redundant information, reducing the amount of data buffered and allowing for data recovery, thereby avoiding compromises that might degrade the end result after fine programming, and utilizing an XOR operation to generate a single page of data from four pages, reducing the need for large memory buffers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If foggy programming is performed to quickly program data to desired voltage levels, then programming speed is improved, but bit error rate increases and data becomes unreadable
Solution Approach 1:
The programming process is divided into two distinct stages: foggy programming (first stage) that quickly programs data to approximate voltage levels, and fine programming (second stage) that refines the data to final voltage levels. This segmentation allows the system to achieve high programming speed in the first stage while correcting errors in the second stage, resolving the contradiction between speed and reliability.
Solution Approach 2:
The foggy programming stage performs preliminary action by quickly bringing cell voltages close to desired levels before the fine programming stage refines them to exact target levels. This preliminary action enables rapid initial programming while setting up conditions for subsequent error correction, balancing speed and reliability.
2Adaptability or versatility
If large data buffering is implemented in the controller to support foggy/fine programming, then multi-bit per cell programming capability is improved, but memory requirements and processing burdens increase
Solution Approach 1:
The patent extracts only the essential redundant information needed for data recovery rather than buffering all four pages of encoded data. By taking out only the necessary parity information and using XOR operations to generate a single page of data, the system reduces memory requirements while maintaining multi-bit per cell programming capability.
Solution Approach 2:
Instead of storing all four pages of encoded data in buffer memory, the system creates a simplified copy using XOR operations that generates a single page of data containing the essential redundancy information. This copying approach maintains the ability to recover original data while dramatically reducing memory requirements.
3Reliability
If error-correcting codes are used to handle high bit error rate during foggy state, then data reliability is improved, but processing complexity increases
Solution Approach 1:
The patent changes the parameter of error correction by using simple XOR operations instead of complex error-correcting codes. This parameter change maintains data reliability during foggy programming while significantly reducing processing complexity, as XOR operations are computationally much simpler than traditional ECC algorithms.
Data Source
AI summary
Storage device programming methods, systems and media are described. A method may include encoding data to generate an encoded set of data. A first programming operation may write the encoded set of data to a memory device. The method includes encoding, using a second encoding operation based on the data, to generate a second set of encoded data. The second set of encoded data is stored to a cache. A first decoding operation is performed, based on the second set of encoded data and the encoded set of data, to generate a decoded set of data. A second decoding operation is performed to generate a second decoded set of data. The second decoded set of data is encoded to generate a third set of encoded data. The method includes performing a second programming operation to write the third set of encoded data to the memory device.