Multi-State Phase Shifter Parallel Cell Architecture
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Solution Overview
Problem
Conventional series-cell phase shifter circuits suffer from excessive insertion loss and poor return loss due to the cumulative effect of series-connected field effect transistor (FET) switches, which worsens with additional phase shifter cells, necessitating a solution for multi-state phase shifting with low insertion loss and good return loss.
Innovation Solution
The implementation of a multi-state phase shifter circuit architecture that combines two or more phase shift elements into a single cell, reducing the number of series-connected FET switches and using parallel signal paths with independently controlled switch pairs and phase shift elements, such as inductors, capacitors, or transmission lines, to achieve the same range of phase shifts with fewer FETs and less extreme component values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If series-connected phase shift cells with multiple FET switches are used to achieve multi-state phase shifting, then the phase shift range and number of states are improved, but the insertion loss increases and return loss deteriorates due to cumulative switch resistance
Solution Approach 1:
The phase shifter is divided into multiple independent phase shift cells, each providing a discrete phase shift state. By segmenting the total phase shift requirement into smaller incremental steps (e.g., 0°, 45°, 90°, 135°), the circuit can achieve multi-state operation while limiting the number of series switches in each cell, thereby reducing cumulative insertion loss per state transition.
Solution Approach 2:
The patent transitions from a conventional series-connected topology to a parallel-connected topology where multiple phase shift cells are connected in parallel between the input and output nodes. This dimensional change allows the RF signal to flow through parallel paths, reducing the cumulative effect of switch resistances and improving both insertion loss and return loss while maintaining multi-state phase shifting capability.
2Adaptability or versatility
If additional phase shift cells are added to increase the number of phase states, then the phase shifting capability is improved, but the insertion loss and return loss worsen due to increased series switch resistance
Solution Approach 1:
Each phase shift cell is segmented as an independent functional unit with its own set of FET switches and reactive elements. This segmentation allows each cell to contribute a specific phase shift increment while maintaining independent control, enabling the system to achieve multiple phase states without proportionally increasing the series switch resistance in the signal path.
Solution Approach 2:
The patent employs a parallel connection architecture where multiple phase shift cells are connected in parallel rather than in series. This dimensional reconfiguration allows the RF signal to bypass the cumulative resistance of multiple switch stacks by flowing through parallel paths, thereby improving return loss while maintaining the ability to select among multiple phase states through digital control.
3Ease of operation
If multiple FET switches are used in series to implement SPDT switch pairs in each phase shift cell, then the switching functionality and input/output symmetry are improved, but the total number of FETs and cumulative resistance increase
Solution Approach 1:
The patent merges the functionality of multiple FET switches into a reduced set of switches per phase shift cell. By carefully designing the switch network topology and utilizing the parallel connection architecture, the circuit achieves the required SPDT switching functionality and input/output symmetry with fewer total FETs, thereby reducing device complexity and cumulative on-resistance while maintaining switching performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces insertion loss and improves return loss across a range of RF frequencies while maintaining comparable phase shift performance, requiring fewer FETs and less complex component values, making it easier to implement in integrated circuits.
Implementation Method 1
each including a respective inductor L1-L3 and capacitor C1-C3
Implementation Method 2
each including a respective inductor L1-L3 and capacitor C1-C3
Implementation Method 3
The switches Sna are typically implemented with field effect transistors (FETs), particularly MOSFETs
Data Source
AI summary
A multi-state phase shifter circuit having both low insertion loss (IL) and good return loss. Two or more phase shift elements are combined into a single cell architecture to reduce the number of series-connected FET switches and reduce the total IL. One embodiment has two ports connected by parallel signal paths each comprising a pair of switches and a phase shift element comprising, for example, an inductor, a capacitor, a transmission line, or a conductor. Another embodiment has two ports connected by parallel signal paths each comprising a switch and at least one associated phase shift element. The switches in each parallel signal path allow the associated phase shift element to be placed in-circuit under the control of an applied signal. The sets of switches may be independently controlled, so that multiple parallel signal paths may be switched into circuit between the phase shifter circuit ports at the same time.