Multi-step Programming of Heat-sensitive NVM in Processors

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Solution Overview

Problem

Heat-sensitive non-volatile memory in processor-based systems is prone to data corruption during thermal packaging processes, and existing programming methods are slow and costly due to low data transfer rates, especially for large memory blocks.

Innovation Solution

A multi-step programming process is employed where a boot loader is first loaded into heat-sensitive non-volatile memory after packaging, and then used to quickly load a program image over a higher-speed peripheral interface into non-volatile program memory, avoiding exposure to thermal processes and reducing programming time and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If firmware is pre-programmed into heat-sensitive non-volatile memory during fabrication, then the processor-based system is ready for execution at first power-up, but the programmed firmware becomes corrupted during thermal packaging processes

Engineering Contradiction:
Improvefirmware integrityVSAvoidthermal damage during packaging
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by programming the firmware into the heat-sensitive non-volatile memory before the packaging process, allowing the memory to be pre-programmed while avoiding exposure to extreme thermal conditions during packaging. This resolves the contradiction by performing the programming action at an optimal time before the harmful thermal packaging process occurs.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If firmware is programmed after packaging using JTAG interface, then data corruption is avoided, but programming speed is slow and cost is prohibitive

Engineering Contradiction:
Improvefirmware integrityVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces an intermediary boot loader program that resides in heat-insensitive memory and facilitates the loading of firmware into heat-sensitive non-volatile memory through a high-speed interface. This intermediary solution enables fast firmware programming after packaging without directly exposing the heat-sensitive memory to programming operations during thermal processes, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If a separate heat-insensitive ROM is used to store boot loader, then firmware can be loaded quickly, but additional cost is incurred

Engineering Contradiction:
Improvefirmware loading speedVSAvoidadditional memory component
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies universality by enabling the heat-sensitive non-volatile memory to serve dual functions: storing firmware after packaging and acting as the primary execution memory. By using the high-speed interface and boot loader mechanism, the system eliminates the need for a separate heat-insensitive ROM, thus reducing device complexity while maintaining fast firmware loading capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9753874B2Multi-step programming of heat-sensitive non-volatile memory (NVM) in processor-based systems
Publication Date: 2017.09.05 QUALCOMM INC
  • US9753874B2 patent drawing
  • US9753874B2 patent drawing
  • US9753874B2 patent drawing

AI summary

Multi-step programming of heat-sensitive non-volatile memory (NVM) in processor-based systems, and related methods and systems are disclosed. To avoid relying on programmed instructions stored in heat-sensitive NVM during fabrication, wherein the programmed instructions can become corrupted during thermal packaging processes, the NVM is programmed in a multi-step programming process. In a first programming step, a boot loader comprising programming instructions is loaded into the NVM. The boot loader may be loaded into the NVM after the thermal processes during packaging are completed to avoid risking data corruption in the boot loader. Thereafter, the programmed image can be loaded quickly into a NV program memory over the peripheral interface using the boot loader to save programming time and associated costs, as opposed to loading the programmed image using lower transfer rate programming techniques. The processor can execute the program instructions to carry out tasks in the processor-based system.