Multi-Step Reactive Ion Etching for Trench Depth Uniformity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing etching techniques for forming deep and high aspect ratio trenches in semiconductor wafers, such as reactive ion etching, suffer from significant trench depth variation and the formation of 'black silicon' due to a large process window and excessive exposure of the wafer surface area.

Innovation Solution

A multi-step reactive ion etching method is employed, where multiple etching steps with overlapping masks are used to form groups of trenches with controlled depth and lateral offset, reducing the exposed surface area during each step to minimize trench depth variation and prevent black silicon formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If reactive ion etching is used to form deep and high aspect ratio trenches, then the trenches can extend deeply into the drift region, but significant trench depth variation occurs across the wafer

Engineering Contradiction:
Improvetrench depthVSAvoidtrench depth uniformity
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent divides the trench formation process into multiple sequential reactive ion etching steps, where each step forms a portion of the final trench depth. By segmenting the etching process and using intermediate masking steps, the patent achieves better depth uniformity across the wafer compared to single-step etching, while still forming the required deep trenches for field plate structures.

Inventive Principle:
Principle #1Segmentation

2Length of moving object

If reactive ion etching is used to form deep trenches, then the field plate can span across the drift region, but black silicon structures are formed

Engineering Contradiction:
Improvetrench depthVSAvoidblack silicon formation
Core Design Contradiction:
Length of moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent employs periodic action by alternating between reactive ion etching steps and masking steps. This periodic process allows the etching to proceed in controlled intervals, preventing the continuous exposure that leads to black silicon formation while still achieving the required trench depth for field plate structures spanning the drift region.

Inventive Principle:
Principle #19Periodic action

3Productivity

If the entire wafer surface is exposed during etching, then all trenches can be formed in one step, but trench depth variation increases

Engineering Contradiction:
Improveetching efficiencyVSAvoidtrench depth uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the wafer surface exposure by using masking steps between etching operations. Instead of exposing the entire wafer surface for a single long etching step, the process divides the exposure into multiple shorter steps with intermediate masking, which improves depth uniformity while maintaining overall productivity through efficient process sequencing.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces trench depth variation and eliminates black silicon, enabling the formation of uniform trenches with improved precision and reduced on-resistance in power semiconductor devices.

Implementation Method 1

A first reactive ion etching step that forms a first group of trenches by removing semiconductor material through the first set of openings is performed

Methodology Applied
Scientific EffectReactive ion etching: Plasma

Implementation Method 2

reactive ion etching process that forms deep and high aspect ratio trenches, while overcoming the drawbacks of previous techniques

Methodology Applied
Scientific EffectPhysical sputtering: Ion Beam

Data Source

PatentUS10580656B2Method of reducing trench depth variation from reactive ion etching process
Publication Date: 2020.03.03 INFINEON TECHNOLOGIES AG
  • US10580656B2 patent drawing
  • US10580656B2 patent drawing
  • US10580656B2 patent drawing

AI summary

A semiconductor wafer having a main surface is provided. A first etch resistant mask is provided on the main surface. A first reactive ion etching step that forms a first group of trenches using the first etch resistant mask is performed. Each of the trenches in the first group is covered with a second etch resistant mask after performing the first reactive ion etching step. A second reactive ion etching step that forms a second group of trenches using one or both of the first etch resistant mask and the second etch resistant mask is performed. The trenches in the second group are laterally offset from the trenches in the first group. The first and second reactive ion etching processes are performed such that a depth of the trenches of the first group is substantially equal to a depth of the trenches in the second group.