Multi-Substrate Inductor Current Loop Area Expansion
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Solution Overview
Problem
The challenge in microelectronic device packaging is to scale electrical connections to match shrinking die sizes and increasing interconnect densities while maintaining high-speed I/O signals, which requires thinner substrate cores with smaller plated through holes, leading to reduced inductor performance due to smaller current loop areas.
Innovation Solution
The solution involves forming inductor structures continuously through both substrates, increasing the current loop area by allowing an increased separation between inductor coils and backside metal, effectively creating an air core inductor, and voiding metal in the inductor core region during substrate manufacturing to enhance performance without additional costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If substrate core thickness is reduced to meet maximum height requirements and support high-speed I/O signals, then signal integrity and height constraints are satisfied, but inductor performance deteriorates due to smaller current loop areas
Solution Approach 1:
The patent extends the inductor structure from a single-substrate planar configuration to a three-dimensional multi-substrate architecture. The inductor traces are formed across multiple substrate layers (first substrate, second substrate, third substrate) with vertical interconnects, effectively adding the z-dimension to the current loop. This dimensional transition increases the available current loop area without increasing the horizontal footprint or substrate thickness, thereby maintaining inductor performance while satisfying height constraints and high-speed signal requirements.
2Adaptability or versatility
If multiple substrates are used to scale interconnect pitch from die level to system board level, then pitch scaling is achieved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges multiple functions into the multi-substrate structure: the substrates serve simultaneously as mechanical support, electrical interconnect media, and inductor formation substrates. The inductor traces are integrated directly into the substrate interconnect layers rather than being separate components, combining the functions of substrate interconnection and passive component formation. This integration reduces overall device complexity despite using multiple substrates, as it eliminates the need for separate inductor components and simplifies the interconnect architecture.
Data Source
AI summary
A microelectronic device comprises a first substrate (110) having a first electrically conductive path (111) therein and a second substrate (120) above the first substrate and having a second electrically conductive path (121) therein, wherein the first electrically conductive path and the second electrically conductive path are electrically connected to each other and form a portion of a current loop (131) of an inductor (130).