Multi TED Display Timing Controller Sync Bus Link Training
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Solution Overview
Problem
As display devices increase in size and resolution, a single embedded timing controller struggles to drive the display panel effectively, leading to the need for a multi embedded timing controller (TED) solution, but existing implementations require hardware and software revisions, particularly due to electro-magnetic interference (EMI) issues in portable devices.
Innovation Solution
A multi TED system that includes a master TED and slave TEDs connected through a sync bus, allowing for full link training and panel self-refresh operations without changing the host's hardware or software, using the sync bus for communication during system booting and normal display operations, and utilizing the HPD line, AUX channel, and main links for data transmission and status updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single embedded timing controller is used to drive the display panel, then the hardware and software structure remains simple, but it cannot effectively drive high-resolution display panels
Solution Approach 1:
The patent divides the timing controller into multiple independent units (master TED and slave TEDs) that can be separately implemented and configured. Each TED handles specific portions of the display panel, allowing high-resolution displays to be driven without requiring a single complex controller. The slave TEDs are integrated into the display panel while the master TED remains external, distributing the control complexity across multiple components.
2Manufacturing precision
If a multi TED system is implemented to drive high-resolution display panels, then display capability is improved, but hardware and software revisions are required due to EMI issues
Solution Approach 1:
The patent introduces a sync bus as an intermediary communication channel between the master TED and slave TEDs. This dedicated communication path allows the multi-TED system to operate without interfering with the existing eDP interface between the host and the display system. The sync bus handles synchronization and control signals separately, preventing EMI issues while maintaining hardware compatibility with existing eDP-based portable devices.
3Reliability
If the sync bus is used for full link training during system booting, then proper initialization is achieved, but communication bandwidth is consumed during boot sequence
Solution Approach 1:
The patent performs full link training through the sync bus during system booting before normal display operations begin. This preliminary action ensures that the communication channel between master and slave TEDs is properly established and calibrated in advance. By completing the time-consuming training process during boot rather than during operation, the system maintains reliable communication while minimizing impact on subsequent performance and power consumption.
4Use of energy by moving object
If panel self-refresh operations are implemented to reduce power consumption, then battery life is extended, but communication overhead is required between TEDs
Solution Approach 1:
The patent implements panel self-refresh functionality where the display panel can refresh its own content without requiring continuous data input from the host system. The slave TEDs, integrated within the panel, manage local refresh operations using stored image data, significantly reducing power consumption during static display periods. The master TED coordinates these operations through the sync bus, enabling the panel to serve its own refresh needs while maintaining synchronization with the host system.
Data Source
AI summary
A timing controller, a multi embedded timing controller (TED), and a display panel including a multi TED are provided. The timing controller includes: a first interface configured to receive data from a host device; and a second interface configured to communicate with another timing controller for driving the display panel, wherein the second interface is configured to communicate full link training information with the other timing controller.