Multi-test Apparatus for Semiconductor Chips Using Segmented Write Drivers
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Solution Overview
Problem
Simultaneous testing of multiple semiconductor chips leads to increased instantaneous current consumption and excessive load on test equipment due to simultaneous driving of write drivers and input buffers.
Innovation Solution
A multi-test apparatus and method that controls write drivers to write test data in memory banks over at least two time periods, either by dividing write drivers into groups and generating substitute test data within the apparatus to reduce simultaneous driving or by blocking external test data from being provided to write drivers and generating internal test data for staggered writing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple write drivers and input buffers are driven simultaneously to test multiple memory banks, then testing efficiency is improved, but instantaneous current consumption increases and excessive load is applied to test equipment
Solution Approach 1:
The patent divides the simultaneous testing operation into multiple time periods by grouping write drivers into different sets. First write drivers test first memory banks in a first time period, then second write drivers test second memory banks in a second time period. This temporal segmentation reduces instantaneous current consumption while maintaining overall testing productivity.
2Productivity
If multiple write drivers and input buffers are driven simultaneously to test multiple memory banks, then testing efficiency is improved, but excessive load is applied to test equipment
Solution Approach 1:
The patent segments the testing process into multiple time periods with different groups of write drivers active in each period. This prevents all write drivers from being driven simultaneously, thereby reducing the excessive load on test equipment while still achieving comprehensive testing of multiple memory banks.
3Use of energy by moving object
If test data is written to multiple memory banks in at least two time periods, then instantaneous current consumption is reduced, but testing time increases
Solution Approach 1:
The patent dynamically adjusts the testing schedule by organizing write drivers into multiple groups that operate in different time periods. This dynamic time-multiplexed approach balances current consumption requirements with testing throughput, reducing peak current while minimizing overall testing time extension.
Data Source
AI summary
An apparatus and method is capable of reducing instantaneously consumed current by allowing write drivers and input buffers not to be simultaneously driven in a multi-test of semiconductor chips. A multi-test apparatus includes an input unit configured to receive data for testing, wherein the data for testing is inputted from a circuit outside of the multi-test apparatus, a plurality of memory banks each including a plurality of memory cells, a plurality of write drivers, corresponding to the respective memory banks, configured to write the test data in the plurality of memory banks, and a write control unit configured to control the plurality of write drivers so that the test data is written in the memory banks in at least two time periods.