Multi-threaded Processor Thread Allocation and Clock Adjustment

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Solution Overview

Problem

Multi-threaded processors consume excessive power due to unnecessary toggling of circuitry when processing fewer software threads than their capacity, as they maintain full load conditions even when not required.

Innovation Solution

Implementing a method to reduce toggling by allocating software threads non-sequentially among hardware threads and adjusting clock signals, allowing storage elements to enter a transparent state, thereby skipping clock cycles and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the processor fully toggles all hardware threads to maintain full load capability, then processing capacity is maximized, but power consumption increases unnecessarily when fewer software threads are executing

Engineering Contradiction:

Improvepower consumptionVSAvoidprocessing capacity

Core Design Contradiction:

PowerVSProductivity

Solution Approach 1:

The processor dynamically adjusts the toggling frequency of hardware threads based on the actual number of software threads being executed. When fewer than N software threads are executing, the processor reduces the toggling frequency of hardware threads from full speed to a lower frequency, thereby reducing power consumption while maintaining adequate processing capacity for the current workload

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The processor changes the operating parameter (clock frequency) of hardware threads based on workload conditions. The control logic detects when fewer than N software threads are executing and responds by changing the clock frequency parameter of the hardware threads from full frequency to a reduced frequency, achieving power savings without completely disabling processing capacity

Inventive Principle:

Principle #35Parameter changes

2Loss of energy

If the processor reduces clock signal toggling to save power, then power consumption decreases, but processing speed may be affected

Engineering Contradiction:

Improveenergy lossVSAvoidprocessing speed

Core Design Contradiction:

Loss of energyVSSpeed

Solution Approach 1:

The processor applies partial action by reducing clock signal toggling only for hardware threads that are not currently assigned to executing software threads. The control logic identifies which hardware threads are idle or underutilized and applies reduced clock frequency specifically to those threads, while maintaining full speed for threads actively processing software threads, thus achieving energy savings without compromising overall processing speed

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS8397238B2Thread allocation and clock cycle adjustment in an interleaved multi-threaded processor

Publication Date: 2013.03.12 QUALCOMM INC

AI summary

Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-threaded processor. In a particular embodiment, a method allocates software threads to hardware threads. A number of software threads to be allocated is identified. It is determined when the number of software threads is less than a number of hardware threads. When the number of software threads is less than the number of hardware threads, at least two of the software threads are allocated to non-sequential hardware threads. A clock signal to be applied to the hardware threads is adjusted responsive to the non-sequential hardware threads allocated.