Multi-Threshold IC Cell Layout Without Dummy Regions
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Solution Overview
Problem
Integrated circuits face challenges in integrating devices with different threshold voltages due to spatial limitations, leading to restricted arrangement and increased area, which affects performance and efficiency.
Innovation Solution
The design of an integrated circuit with cells arranged in rows, where cells with different threshold voltage devices are placed adjacent to each other, allowing for optimal placement without dummy regions, thereby maximizing performance and efficiency by aligning cells with the same length in perpendicular directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If devices with different threshold voltages are integrated into an integrated circuit, then the circuit can satisfy various performance needs (high speed and low power consumption), but it becomes difficult to integrate these devices due to spatial limitations
Solution Approach 1:
The integrated circuit is divided into multiple rows, with each row containing devices of the same threshold voltage type. This segmentation allows LVT devices to be placed in one row and HVT devices in another row, eliminating the need for dummy regions and simplifying the manufacturing process while maintaining the ability to satisfy various performance needs
Solution Approach 2:
The patent introduces a row-based dimensional organization where devices are arranged in multiple rows extending in a first direction, with each row dedicated to a specific threshold voltage type. This dimensional separation resolves the spatial conflict between different threshold voltage devices and enables easier integration
2Productivity
If devices with different threshold voltages are integrated, then high operation speed and low power consumption can be achieved, but the area of the integrated circuit increases
Solution Approach 1:
Different rows are assigned different threshold voltage characteristics: rows with LVT devices provide high operation speed for performance-critical functions, while rows with HVT devices provide low power consumption for power-sensitive functions. This local quality differentiation optimizes both speed and power without requiring additional area
Solution Approach 2:
The patent merges multiple rows of devices with different threshold voltages into a single integrated circuit structure, allowing simultaneous access to both high-speed LVT devices and low-power HVT devices within the same chip area, thereby achieving both performance goals without area penalty
3Adaptability or versatility
If devices with different threshold voltages are integrated, then various performance characteristics can be obtained, but the arrangement of devices is restricted
Solution Approach 1:
By segmenting the circuit into rows with uniform threshold voltage characteristics, the patent simplifies the arrangement rules: devices of the same type can be freely placed within their designated rows without worrying about compatibility issues with adjacent devices, thus reducing arrangement complexity while maintaining performance versatility
Data Source
AI summary
An integrated circuit includes a first cell disposed in a first row and a second row, which are adjacent to each other and extend in a first direction, and including a plurality of first threshold voltage devices and at least one second cell disposed adjacent to the first cell in at least one of the first row and the second row and including at least one second threshold voltage device, wherein the plurality of first threshold voltage devices include at least one first device configured to perform a first function in the first row and at least one second device configured to perform a second function, which is different from the first function, in the second row.