Multi-Threshold GaN HEMT Structure Using Barrier Thickness Variation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current GaN-based HEMT devices face challenges in achieving high and low threshold voltage logic circuits due to low hole mobility, poor p-GaN ohmic contact preparation, and issues with gate interface states, which limit their operational speed and reliability.
Innovation Solution
A GaN-based HEMT structure with multiple threshold voltages is developed by creating a barrier layer with varying thicknesses in different gate areas, allowing for the formation of multiple HEMT units with distinct threshold voltages. This structure uses high-mobility 2DEG as conductive channels and eliminates the need for p-GaN ohmic contact preparation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If p-GaN ohmic contact is prepared with high-concentration Mg doping, then hole concentration is improved, but hole mobility remains low and manufacturing complexity increases
Solution Approach 1:
The patent divides the single HEMT structure into multiple HEMT units (first HEMT unit and second HEMT unit) with different barrier layer thicknesses in different gate areas, enabling each unit to have distinct threshold voltages. This segmentation allows the circuit to achieve both high and low threshold voltage functions without requiring separate p-GaN devices with complex doping processes.
Solution Approach 2:
The patent applies local quality by creating spatial variation in barrier layer thickness across different gate areas. The first gate area has a first thickness while the second gate area has a second thickness, resulting in locally different electrical characteristics and threshold voltages. This local differentiation enables multiple threshold voltage levels within a single uniform doped structure.
2Device complexity
If GaN-based complementary logic circuit uses p-FET with low hole mobility, then device structure is achieved, but operational speed is limited
Solution Approach 1:
The patent changes the critical parameter of barrier layer thickness to control threshold voltage. By adjusting the thickness parameter in different gate areas, the invention achieves different threshold voltage levels (high and low) that enable logic circuit operations. This parameter-based control replaces the need for low-mobility p-GaN channels and achieves high-speed operation through n-type 2DEG channels with superior mobility.
3Adaptability or versatility
If multiple threshold voltage devices are implemented on the same wafer, then logic circuit functionality is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by establishing the barrier layer with spatially varying thickness before any gate or contact fabrication steps. This pre-established thickness variation ensures that the threshold voltage differentiation is built into the fundamental device structure, making subsequent processing steps simpler and more uniform across the wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables the implementation of enhanced GaN-based HEMT devices with multiple threshold voltages on the same wafer, improving operational speed, reliability, and reducing power consumption, thus meeting the requirements of high and low threshold logic circuits.
Implementation Method 1
using, as a conductive channel, Two-dimensional Electron Gas (2DEG) induced by an AlGaN/GaN heterojunction polarization effect
Data Source
AI summary
A GaN-based High Electron Mobility Transistor (HEMT) having a multi-threshold voltage, a preparation method, and an application therefor are provided. The HEMT structure includes a channel layer and a barrier layer; a Two-dimensional Electron Gas (2DEG) is formed between the channel layer and the barrier layer; the barrier layer is at least provided with a first source area, a second source area, a first gate area, a second gate area, a first drain area, and a second drain area; the first source area, the first gate area, and the first drain area cooperate with each other, so as to form a first HEMT unit; the second source area, the second gate area, and the second drain area cooperate with each other, so as to form a second HEMT unit. that the HEMT may well meet application requirements of high and low threshold logic circuits.