Multi-Threshold MBC Transistors for Low-Voltage SRAM Retention

Solution Overview

Problem

As semiconductor devices move towards smaller technology nodes, multi-gate devices like MBC transistors face challenges in maintaining data retention at lower nominal supply voltages, leading to potential retention faults and memory loss, necessitating separate power circuits for memory and logic device regions, which increases space and power consumption.

Innovation Solution

The implementation of MBC transistors in SRAM devices with standard, low, and ultralow threshold voltage devices, where channel members are wrapped around by different metal or dipole layers, allowing for operation at lower voltages without retention faults, enabling a single power circuit for both memory and logic device regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate power circuits are used for memory and logic device regions, then data retention is ensured, but device area and power consumption increase

Engineering Contradiction:

Improvedata retentionVSAvoiddevice area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the power circuit requirements for memory and logic device regions by implementing multiple threshold voltage devices within a single SRAM device. The multi-gate device with different work function metal layers can operate at different threshold voltages, allowing it to function as both a memory device (requiring data retention) and a logic device (operating at lower voltages). This eliminates the need for separate power circuits, thereby reducing device area and power consumption while ensuring data retention

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If separate power circuits are used for memory and logic device regions, then data retention is ensured, but power consumption increases

Engineering Contradiction:

Improvedata retentionVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the power circuit requirements for memory and logic device regions by implementing multiple threshold voltage devices within a single SRAM device. The multi-gate device with different work function metal layers can operate at different threshold voltages, allowing it to function as both a memory device (requiring data retention) and a logic device (operating at lower voltages). This eliminates the need for separate power circuits, thereby reducing device area and power consumption while ensuring data retention

Inventive Principle:

Principle #5Merging (Combining)

3Productivity

If device dimensions are shrunk to increase functional density, then production efficiency is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveproduction efficiencyVSAvoidmanufacturing complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the gate structure into multiple independent work function metal layers, each surrounding a different channel member. This segmentation allows for independent formation and control of each metal layer, which can be achieved through sequential deposition processes. The segmented approach enables precise control of threshold voltages for different channel members while maintaining compatibility with standard semiconductor manufacturing processes, thus increasing production efficiency without excessively increasing manufacturing complexity

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures good data retention at lower voltages, reduces power consumption, and minimizes device area by eliminating the need for separate power circuits, while improving the minimum supply voltage and reducing device complexity.

Implementation Method 1

Each of the first work function metal layer, the second work function metal layer, and the third work function metal layer have a different work function

Methodology Applied

Scientific EffectWork function:

Data Source

PatentUS12063768B2Transistors with multiple threshold voltages

Publication Date: 2024.08.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Semiconductor structures and methods are provided. A method according to the present disclosure includes forming a first channel member, a second channel member directly over the first channel member, and a third channel member directly over the second channel member, depositing a first metal layer around each of the first channel member, the second channel member, and the third channel member, removing the first metal layer from around the second channel member and the third channel member while the first channel member remains wrapped around by the first metal layer, after the removing of the first metal layer, depositing a second metal layer around the second channel member and the third channel member, removing the second metal layer from around the third channel member, and after the removing of the second metal layer, depositing a third metal layer around the third channel member.