Multi-tier defect scan management for memory subsystems

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Solution Overview

Problem

Current defectivity scans in memory sub-systems consume significant time and resources, leading to increased latency and power consumption, and can result in false positive defect detection, necessitating unnecessary remedial operations.

Innovation Solution

Implementing a multi-tiered defect scan management system that performs initial lower-tier scans quickly with reduced accuracy, and only conducts higher-tier scans with increased accuracy when defects are indicated, thereby minimizing unnecessary operations and optimizing resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional defect scans are performed with high accuracy, then defect detection reliability is improved, but scanning time and power consumption increase significantly

Engineering Contradiction:
Improvedefect detection reliabilityVSAvoidscanning time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The defect scan is divided into multiple tiers: a first tier using fast, low-accuracy scan patterns for initial screening, and a second tier using slower, high-accuracy scan patterns for verification. This segmentation allows most areas to be quickly screened while only potentially defective areas undergo thorough inspection, resolving the contradiction between speed and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of performing full high-accuracy scans on the entire memory device, the system performs partial high-accuracy scans only on areas where defects are suspected based on first-tier results. This partial action maintains reliability for critical defect detection while significantly reducing overall scanning time and power consumption.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If traditional defect scans are performed with high accuracy, then defect detection reliability is improved, but power consumption increases significantly

Engineering Contradiction:
Improvedefect detection reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The scan process is segmented into low-power first-tier patterns and high-power second-tier patterns. By executing the majority of scans at the first tier level and only escalating to the second tier when necessary, the system maintains defect detection reliability while dramatically reducing average power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

High-power second-tier scans are performed only partially, specifically on regions where defects are indicated by first-tier scans. This selective application of high-power operations maintains reliability for critical defects while minimizing overall power consumption across the entire scanning process.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If high-accuracy scans are performed on all areas, then false positive detection is reduced, but scanning time and resource usage increase

Engineering Contradiction:
Improvedefect detection precisionVSAvoidscanning throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The scanning process is segmented into two precision levels: first-tier scans with lower precision for rapid coverage, and second-tier scans with high precision for verification. This segmentation reduces false positives by applying high precision only where needed, thereby maintaining measurement precision while improving overall scanning throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

High-precision second-tier scans are applied partially only to areas flagged by first-tier scans rather than uniformly across the entire memory device. This partial application reduces false positive detection while preserving productivity by avoiding unnecessary high-precision scanning of defect-free areas.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240402922A1Two-tier defect scan management
Publication Date: 2024.12.05 MICRON TECHNOLOGY INC
  • US20240402922A1 patent drawing
  • US20240402922A1 patent drawing
  • US20240402922A1 patent drawing

AI summary

A system can include a processing device operatively coupled with the one or more memory devices, to perform operations that include writing data to the one or more memory devices and performing one or more scan operations on a management unit containing the data to determine a current value of a chosen data state metric. Each scan operation can be performed using a corresponding predetermined read-time parameter value. The operations can include determining whether the current value of the chosen data state metric satisfies a criterion, and can also include, responsive to determining that the current value of the chosen data state metric satisfies the criterion, selecting a remedial operation by determining whether redundancy metadata is included in a fault tolerant data stripe on the one or more memory devices. The operations can also include performing the remedial operation with respect to the management unit.