Multi-Tier Heat Sink Layout for Dense Multi-Chip Cooling
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Solution Overview
Problem
Traditional heat sink systems for multi-chip modules either require large, expensive designs to cool all IC chips to the lowest maximum temperature or consume excessive space when using individual heat sinks for each chip, limiting the number of chips that can be accommodated.
Innovation Solution
A multi-tiered heat sink system where heat sinks are positioned at different heights above a substrate, with each heat sink thermally coupled to specific IC chips, allowing for differentiated cooling and reducing the overall area required compared to co-planar designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single heat sink is used to cool all IC chips to the lowest maximum temperature, then all IC chips can be cooled adequately, but the heat sink becomes prohibitively large and expensive
Solution Approach 1:
The heat dissipation system is segmented into multiple independent heat sinks, each assigned to specific IC chips based on their thermal requirements. This allows each heat sink to be optimized for its specific load rather than designing one oversized heat sink for all chips, thereby reducing overall material usage and cost while maintaining adequate cooling for each chip.
Solution Approach 2:
Different heat sinks with different thermal performance characteristics are assigned to different IC chips based on their specific heat dissipation requirements. High-power chips receive heat sinks with higher thermal conductivity and larger surface area, while low-power chips use smaller, less expensive heat sinks. This localized optimization ensures adequate cooling for all chips without the excessive cost and size of a uniform high-performance heat sink.
2Reliability
If individual heat sinks are used for each IC chip, then each chip can be cooled to its specific maximum operating temperature, but the total area consumed by multiple heat sinks limits the number of IC chips that can be included
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of heat sinks to a three-dimensional stacked configuration. Heat sinks are arranged in multiple tiers at different heights above the substrate, with upper-tier heat sinks positioned vertically above lower-tier heat sinks. This vertical stacking allows multiple heat sinks to occupy overlapping horizontal footprints, dramatically reducing the total planar area required while maintaining individual thermal performance for each IC chip.
3Reliability
If multiple heat sinks are arranged in a co-planar configuration, then each IC chip can have dedicated cooling, but the area required increases and limits chip density
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of heat sinks to a three-dimensional stacked configuration. Heat sinks are arranged in multiple tiers at different heights above the substrate, with upper-tier heat sinks positioned vertically above lower-tier heat sinks. This vertical stacking allows multiple heat sinks to occupy overlapping horizontal footprints, dramatically reducing the total planar area required while maintaining individual thermal performance for each IC chip.
Solution Approach 2:
The patent implements a nested arrangement where upper-tier heat sinks are positioned within the vertical projection of lower-tier heat sinks. This nesting allows the heat sinks to be stacked vertically with minimal horizontal separation, maximizing the use of vertical space and minimizing the overall footprint. The nested configuration enables higher chip density without compromising dedicated cooling for each IC chip.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-tiered system effectively dissipates heat from multiple IC chips with varying heat dissipation needs while minimizing space and cost, enabling a higher density of IC chips within a given module size.
Implementation Method 1
a heat sink comprises a thermally conductive material that transfers heat away from the IC chip to thereby cool the IC chip
Data Source
AI summary
A multi-chip integrated circuit (IC) apparatus includes a substrate, one or more first IC chips mounted on the substrate, and a second IC chip mounted on the substrate. One or more first heat sinks are respectively thermally coupled to the one or more first IC chips. A second heat sink is thermally coupled to the second IC chip. An under side of the second heat sink is located further from the substrate than each of respective one or more top sides of the one or more first heat sinks.


