Multi-Tier Solder Resist Structure for Bump Bridge Mitigation

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Solution Overview

Problem

As integrated circuits evolve with smaller feature sizes and larger footprints, substrate warpage can cause conductive bumps to short or bridge, leading to manufacturing failures and reduced reliability.

Innovation Solution

Implementing a multi-tier solder resist structure made of dielectric material with varying widths at different heights between adjacent conductive bumps to prevent bridging and shorting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If substrate warpage is allowed to occur naturally during manufacturing, then manufacturing process simplicity is maintained, but conductive bumps may short or bridge leading to manufacturing failures

Engineering Contradiction:
Improveconductive bump isolationVSAvoidsolder resist structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The solder resist structure is divided into multiple tiers with different widths at different heights. The first tier has a first width and the second tier has a second width that is different from the first width, creating segmented protection zones that adapt to the warpage-induced spacing variations between conductive bumps

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the solder resist structure are given different widths to provide localized protection. The varying width configuration ensures adequate isolation in regions where warpage causes greater spacing changes while maintaining appropriate clearance in regions with less variation

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If feature sizes are reduced to increase processing power, then integration density is improved, but substrate warpage effects are amplified causing more bridging risks

Engineering Contradiction:
Improvefeature sizeVSAvoidbump spacing consistency
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The solder resist structure extends into the vertical dimension with multiple tiers at different heights. This multi-level configuration provides protection against warpage-induced spacing variations by creating isolation barriers at multiple vertical levels, compensating for horizontal spacing inconsistencies caused by substrate deformation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250316572A1Solder resist structure to mitigate solder bridge risk
Publication Date: 2025.10.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250316572A1 patent drawing
  • US20250316572A1 patent drawing
  • US20250316572A1 patent drawing

AI summary

Some embodiments relate to a semiconductor structure including a substrate with conductive pads and conductive bumps disposed on the conductive pads, respectively. A multi-tiered solder-resist structure includes a first tier and a second tier. The first tier includes a first dielectric material and first conductive bump openings defined by inner sidewalls of the first tier. The first tier has a first width measured through the first dielectric material between the inner sidewalls of the first tier in a cross-sectional view. The second tier overlies the first tier and includes a second dielectric material and second conductive bump openings defined by inner sidewalls of the second tier. The second tier has a second width measured through the second dielectric material between the inner sidewalls of the second tier in the cross-sectional view. A ratio of the first width to the second width ranges from 1.1:1 to 2:1.