Multi-Transistor Frequency Mixer for Low DC Offset and CIM3
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Solution Overview
Problem
Existing frequency mixing circuits with single-transistor structures face a trade-off between noise figure and third-order intermodulation distortion, leading to excessive DC offset when transistor size is increased for optimization, exceeding manufacturing limits.
Innovation Solution
A frequency mixing circuit with a multi-transistor structure is introduced, where one transistor remains non-conductive, preventing excessive noise introduction and optimizing CIM3 performance by eliminating high-order harmonics through capacitive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transistor size is enlarged to optimize noise performance and CIM3 performance, then the noise figure and CIM3 performance are improved, but the DC offset at the TIA output exceeds the allowable range
Solution Approach 1:
The patent divides the single transistor into multiple transistors (first transistor M1, second transistor M2, third transistor M3, fourth transistor M4) arranged in a multi-transistor structure. This segmentation allows the circuit to achieve the desired noise performance and CIM3 performance without requiring excessive enlargement of individual transistor sizes, thereby keeping the DC offset within the allowable range of ±25 mV in the 55 nm manufacturing process.
2Reliability
If the transistor size is enlarged to improve anti-interference ability against high-order harmonics, then the CIM3 performance is improved, but the DC offset exceeds the allowable range
Solution Approach 1:
The patent segments the transistor function across multiple transistors (M1, M2, M3, M4) in a bridge configuration. This segmentation enables the circuit to achieve superior anti-interference ability against high-order harmonics and improved CIM3 performance while maintaining transistor sizes that keep the DC offset within the allowable ±25 mV range.
Solution Approach 2:
The patent combines multiple transistors in a bridge configuration where the first and second transistors are connected in parallel between the drain and source, and the third and fourth transistors are connected in parallel between the gate and source. This merging of multiple transistors achieves the desired CIM3 performance without requiring excessive size enlargement of individual devices.
3Reliability
If a multi-transistor structure is used to improve anti-interference ability, then the CIM3 performance is improved, but additional noises may be introduced excessively
Solution Approach 1:
The patent merges multiple transistors in a bridge configuration where M1 and M2 are connected in parallel between drain and source, and M3 and M4 are connected in parallel between gate and source. This merging approach improves anti-interference ability against high-order harmonics while the parallel connection topology ensures that additional noises are not introduced excessively, as the transistors work cooperatively rather than independently adding noise.
Data Source
AI summary
A frequency mixing circuit includes: a first transistor and a second transistor. The first transistor has a control terminal, a first terminal and a second terminal. The control terminal of the first transistor is configured to receive an oscillation signal, the first terminal of the first transistor is configured to output a mixed signal, and the second terminal of the first transistor is configured to receive a source signal. The second transistor has a control terminal, a first terminal and a second terminal. The control terminal of the second transistor is coupled to the second terminal of the first transistor, the first terminal of the second transistor is coupled to the first terminal of the first transistor, and the second terminal of the second transistor is coupled to the control terminal of the first transistor.