Multi-tuner Interpolative Dividers for Area and Power Reduction

Solution Overview

Problem

Integrating multiple tuners on a single semiconductor die is challenging due to area and power consumption issues, as well as performance constraints, particularly in implementing a single tuner with multiple channel reception capabilities such as picture-in-picture and fast channel switching.

Innovation Solution

A multi-tuner circuit is designed on a single semiconductor die, utilizing a splitter for RF signal distribution, amplifiers, mixers with local oscillators, filters, digitizers, and a clock generation circuit with interpolative dividers to generate local oscillator signals, allowing for efficient downconversion and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple discrete tuners are provided to enable multiple channel reception capabilities, then channel reception capabilities and switching performance are improved, but area and power consumption increase

Engineering Contradiction:

Improvechannel reception capabilitiesVSAvoidarea per tuner

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple tuners into a single integrated circuit by sharing common components including the frequency synthesizer, interpolative dividers, amplifiers, mixers, and filters across multiple tuner channels. This consolidation enables multiple channel reception capabilities while significantly reducing the total area compared to using separate discrete tuners for each channel.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The frequency synthesizer and interpolative dividers serve multiple functions by generating local oscillator signals for multiple different tuner channels simultaneously. A single frequency synthesizer supports multiple tuners through programmable frequency generation, eliminating the need for separate VCOs in each tuner and reducing overall circuit area.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple discrete tuners are provided to enable multiple channel reception capabilities, then channel reception capabilities and switching performance are improved, but power consumption increases

Engineering Contradiction:

Improvechannel reception capabilitiesVSAvoidpower consumption per tuner

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges multiple tuners into a single integrated circuit by sharing common components including the frequency synthesizer, interpolative dividers, amplifiers, mixers, and filters across multiple tuner channels. This consolidation enables multiple channel reception capabilities while significantly reducing the total area compared to using separate discrete tuners for each channel.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The frequency synthesizer and interpolative dividers serve multiple functions by generating local oscillator signals for multiple different tuner channels simultaneously. A single frequency synthesizer supports multiple tuners through programmable frequency generation, eliminating the need for separate VCOs in each tuner and reducing overall circuit area.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Area of stationary object

If multiple tuners are integrated on a single die, then area and power efficiency are improved, but performance issues arise

Engineering Contradiction:

Improvearea per tunerVSAvoidperformance

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The patent segments the multi-tuner circuit into distinct functional blocks including separate mixer stages, filters, and digitizers for each tuner channel, while sharing common resources such as the frequency synthesizer and interpolative dividers. This segmentation allows each tuner to operate independently with optimized performance while maintaining area efficiency through shared components.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The interpolative dividers act as intermediaries between the frequency synthesizer and the mixers, generating precise local oscillator signals for each tuner channel. These dividers enable frequency division and interpolation to provide accurate LO signals for downconversion, facilitating reliable signal processing across multiple tuners while maintaining performance integrity.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9106867B2Multi-tuner using interpolative dividers

Publication Date: 2015.08.11 SILICON LABORATORIES INC

AI summary

An apparatus includes a splitter to receive a radio frequency (RF) signal and to provide the RF signal to multiple channels of a tuner. Each channel may include an amplifier to amplify the RF signal, a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, where each of the channels is configured to receive a different LO signal, a filter to filter the downconverted second frequency signal, and a digitizer to digitize the downconverted second frequency signal. A clock generation circuit has multiple interpolative dividers and a frequency synthesizer to generate a reference clock signal. Each of the interpolative dividers is configured to receive the reference clock signal, generate a corresponding LO signal, and provide the corresponding LO signal to the mixer of at least one of the channels.