Multi-Voltage Standard Cell Tracks for Timing-Power Tradeoffs
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Solution Overview
Problem
Integrated circuits face challenges in achieving timing convergence while reducing power consumption and area usage at low and ultra-low voltage levels, as lowering supply voltages increases timing delays and variations, leading to a trade-off between power consumption and area constraints.
Innovation Solution
The implementation of multiple supply voltage tracks providing different supply voltages and standard cells connected to these tracks to optimize timing delays and power consumption, along with multiple standard cell libraries for various voltage levels, allows for the selection of cells that balance timing and power constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage is lowered to reduce power consumption, then power consumption is reduced, but timing delays and variations increase
Solution Approach 1:
The power supply network is segmented into multiple voltage domains, with different regions receiving different supply voltages. This allows critical timing paths to receive higher voltages for faster operation while non-critical regions operate at lower voltages to save power, thereby resolving the contradiction between power consumption and timing delays.
Solution Approach 2:
Different regions of the integrated circuit are assigned different supply voltage qualities based on their specific timing and power requirements. Critical paths receive higher voltage quality for speed, while non-critical areas receive lower voltage quality for power savings, optimizing the overall power-timing tradeoff.
2Use of energy by moving object
If supply voltage is lowered to reduce power consumption, then power consumption is reduced, but timing variations increase
Solution Approach 1:
The circuit is divided into multiple voltage domains with independent voltage control. This segmentation allows timing-critical paths to be isolated in high-voltage domains with stable timing characteristics, while non-critical paths operate in low-voltage domains, thereby reducing overall timing variations while maintaining low power consumption.
Solution Approach 2:
The supply voltage parameter is changed and optimized for different regions based on their timing sensitivity. By adjusting voltage levels locally rather than uniformly, the patent achieves reduced power consumption while maintaining acceptable timing variation levels through parameter optimization.
3Loss of time
If multiple supply voltage tracks are implemented to optimize timing, then timing delays are reduced, but device complexity increases
Solution Approach 1:
The multiple supply voltage tracks serve multiple functions simultaneously: they provide power delivery, enable timing optimization, and support voltage scaling for power management. This multi-functionality reduces the need for separate dedicated structures, thereby managing device complexity while achieving timing improvements.
Solution Approach 2:
The voltage selection and allocation to different tracks is dynamic and adaptable based on operating conditions. The system can dynamically adjust which voltage track serves which function, allowing flexible optimization of timing while managing complexity through adaptive resource allocation rather than fixed complex routing.
Data Source
AI summary
A device including a first supply voltage track, a second supply voltage track, a first reference track, a first standard cell, and a second standard cell. The first supply voltage track is configured to provide a first voltage and the second supply voltage track is configured to provide a second voltage that is greater than the first voltage. The first standard cell is configured to be electrically connected to the first supply voltage track to receive the first voltage and electrically connected to the first reference track. The second standard cell is configured to be electrically connected to the second supply voltage track to receive the second voltage and electrically connected to the first reference track.