Multi-Voltage Rail ESD Circuit for Thin-Gate Output Drivers

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Solution Overview

Problem

IC devices are increasingly susceptible to electrostatic discharge (ESD) events due to reduced transistor gate lengths and feature sizes, particularly at the interface between low-voltage and high-voltage domains, leading to potential damage from overvoltage conditions during ESD events.

Innovation Solution

The implementation of an ESD protection circuit with diodes and resistive elements coupled between power sources and I/O pads, diverting ESD currents through multiple voltage domains, and using clamping circuits to manage voltage differentials during ESD events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transistor gate length is reduced to increase transistor density, then productivity is improved, but susceptibility to ESD events increases

Engineering Contradiction:
Improvetransistor densityVSAvoidESD susceptibility
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The ESD protection circuit is segmented into multiple diodes (first diode, second diode) that are coupled to different voltage domains (first voltage domain, second voltage domain). Each diode handles ESD events specific to its voltage domain, allowing the circuit to protect against ESD events while maintaining high transistor density through reduced gate length.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Diodes are introduced as intermediary components between the I/O pad and different voltage domains. These diodes act as mediators that divert ESD current away from sensitive circuits, enabling the use of smaller gate lengths without increasing ESD susceptibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ESD protection circuits are added to protect interface circuits, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImproveESD protectionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The diodes in the ESD protection circuit serve multiple functions: they protect against ESD events, clamp voltage to safe levels, and operate across multiple voltage domains. This multi-functionality reduces the need for separate protection circuits for each voltage domain, thereby limiting the increase in device complexity while improving reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The circuit uses parameter changes in voltage levels across different domains (first voltage domain, second voltage domain) to implement ESD protection. By adapting the protection mechanism to different voltage parameters, the circuit achieves comprehensive protection without requiring entirely separate protection circuits for each domain, thus limiting complexity increase.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If diodes are coupled between multiple power sources and I/O pad to divert ESD current, then ESD protection is improved, but voltage differential management becomes more complex

Engineering Contradiction:
ImproveESD current diversionVSAvoidvoltage differential management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage differential management is segmented by assigning specific diodes to specific voltage domains. The first diode handles voltage differentials between the first power source and I/O pad, while the second diode handles differentials between the second power source and I/O pad. This segmentation simplifies the overall management of voltage differentials while improving ESD protection effectiveness.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces overvoltage conditions and protects IC devices from ESD-related damage by managing voltage differentials across multiple voltage domains, ensuring robust ESD protection without compromising high-speed performance.

Implementation Method 1

IC devices are increasingly susceptible to electrostatic discharge (ESD) events due to reduced transistor gate lengths and feature sizes

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Implementation Method 2

A terminal of the second diode may be coupled to the I/O pad through a resistive element

Methodology Applied
Scientific EffectJoule Heating: Joule Heating

Data Source

PatentUS12456859B2Electrostatic discharge circuit for multi-voltage rail thin-gate output driver
Publication Date: 2025.10.28 QUALCOMM INC
  • US12456859B2 patent drawing
  • US12456859B2 patent drawing
  • US12456859B2 patent drawing

AI summary

An ESD protection circuit in an interface circuit has a first diode coupled between a first power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a second power source of the integrated circuit device and the input/output pad, and a resistive element that couples the second diode to the first diode and to the input/output pad. The first power source supplies a driver circuit coupled to the input/output pad. The second power source supplies one or more core circuits of the integrated circuit device. The resistive element may be implemented as an interconnect configured to provide a resistance that produces a voltage differential between a terminal of the second diode and a corresponding terminal of the first diode during an electrostatic discharge event.