Multi-Voltage Power-Up Signal Circuit for Stable Initialization
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Solution Overview
Problem
Semiconductor devices face reliability issues and operation errors due to unstable power supply voltages, particularly when multiple power supply voltages with different rise speeds or orders are used, leading to potential latch-up phenomena and incomplete initialization of internal circuits.
Innovation Solution
A power-up signal generation circuit that includes pre-power-up signal generation blocks, level shifting blocks, and power-up signal driving blocks to stabilize the initialization of internal circuits by generating power-up signals based on multiple power supply voltages, ensuring that power is supplied only when voltages are stabilized, regardless of the order in which they rise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single power-up signal generation method is used, then the circuit structure is simple, but the initialization is unstable when multiple power supply voltages with different rise speeds are used
Solution Approach 1:
The power-up signal generation circuit is divided into multiple independent modules: a first power-up signal generation block for the first power supply voltage, a second power-up signal generation block for the second power supply voltage, and a signal combination block. Each block independently monitors its respective power supply voltage and generates power-up signals, which are then combined through logical operations to control the internal circuit initialization, ensuring stable operation regardless of voltage rise speed differences
Solution Approach 2:
The signal combination block acts as an intermediary that receives power-up signals from both the first and second power-up signal generation blocks, performs logical operations on these signals, and generates the final power-up signal. This intermediary structure ensures that the internal circuit is initialized only when both power supply voltages have stabilized, resolving the contradiction between simple structure and reliable initialization
2Speed
If power supply voltage is supplied quickly, then the operation speed is high, but latch-up phenomena may occur before stabilization
Solution Approach 1:
The power-up signal generation blocks monitor the power supply voltages in advance and generate power-up signals only when the voltages reach their target levels and stabilize. This preliminary detection and signal generation mechanism ensures that the internal circuit receives power only after stabilization, preventing latch-up phenomena while allowing fast voltage rise
3Productivity
If internal circuit operation starts early, then the productivity is high, but operation errors occur due to uncertain signal values
Solution Approach 1:
The power-up signal generation blocks continuously monitor the power supply voltage levels and use this feedback information to determine when to generate the power-up signal. This feedback mechanism ensures that the internal circuit operation is delayed until both power supply voltages have stabilized to their target levels, preventing operation errors while minimizing delay
Data Source
AI summary
A power-up signal generation circuit including a pre-power-up signal generation block operates by using a first power supply voltage, and generates a pre-power-up signal when the first power supply voltage becomes higher than a first level, and a second power supply voltage becomes higher than a second level; a level shifting block suitable for pull-down driving a first node when the pre-power-up signal is not in an activated state, and pull-up driving the first node with the second power supply voltage when the pre-power-up signal is in the activated state; a driving block suitable for pull-down driving the first node when the second power supply voltage is lower than the second level; and a power-up signal driving block operates by using the second power supply voltage, and generates a power-up signal through a second node by driving the second node based on a voltage level of the first node.