Multi-VPU Memory Mapping via GART Virtual Addressing

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Solution Overview

Problem

Current graphics and video processing systems face challenges in producing high-quality, complex video at affordable costs for mass production, while also requiring excessive memory and computational complexity, and are not seamlessly compatible with existing computer systems.

Innovation Solution

A video processing system that utilizes multiple graphics or video processing units (VPUs) sharing rendering tasks in parallel, with each VPU accessing the local memories of others through a virtual addressing scheme, allowing for cooperative processing and minimizing the need for unique addressing, and combining data from multiple VPUs to produce image data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple VPUs share rendering tasks in parallel with virtual addressing scheme, then productivity and video quality are improved, but device complexity increases

Engineering Contradiction:
Improvevideo processing capabilityVSAvoidmemory mapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a universal memory mapping approach where each VPU is configured with identical address ranges in its GART that map to the same physical memory locations of other VPUs. This universal addressing scheme allows any VPU to access any other VPU's local memory using the same address space, eliminating the need for complex unique addressing schemes while enabling parallel cooperative rendering.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates virtual copies of memory address spaces by mapping each VPU's local memory into the GART of every other VPU with identical address ranges. This copying approach allows VPUs to access each other's memory as if it were their own local memory, simplifying the addressing mechanism while enabling efficient inter-VPU data access for parallel processing.

Inventive Principle:
Principle #26Copying

2Quantity of substance

If multiple VPUs access each other's local memories through GART, then memory requirements are reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvememory requirementsVSAvoidaddress mapping precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent changes the addressing parameter from unique per-VPU address spaces to identical shared address ranges. By configuring each VPU's GART to map other VPUs' local memories using the same address ranges that each VPU uses for its own memory, the system reduces total memory requirements while maintaining precise address mapping through standardized parameter configuration.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If VPUs use identical address ranges for accessing own and other VPUs' memories, then ease of operation improves, but reliability challenges arise

Engineering Contradiction:
Improveaddressing simplicityVSAvoidmemory access correctness
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces the GART (Graphics Address Remapping Table) as an intermediary layer between virtual addresses and physical memory locations. The GART translates identical address ranges from multiple VPUs into distinct physical memory locations, allowing simple identical addressing while maintaining reliable correct memory access through the mediating translation mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7663635B2Multiple video processor unit (VPU) memory mapping
Publication Date: 2010.02.16 ATI TECHNOLOGIES ULC
  • US7663635B2 patent drawing
  • US7663635B2 patent drawing
  • US7663635B2 patent drawing

AI summary

A system and method for memory mapping in a multiple video processor (multi VPU) system is described. In various embodiments, rendering tasks are shared among multiple VPUs in parallel to provide improved performance and capability with minimal increased cost. In various embodiments, multiple VPUs in a system access each other's local memories to facilitate cooperative video processing. In one embodiment, each VPU in the system has the local memories of each other VPU mapped to its own graphics aperture relocation table (GART) table to facilitate access via a virtual addressing scheme. Each VPU uses the same virtual addresses for this mapping to other VPU local memories. This allows the driver to send exactly the same write commands to each VPU, including the numeric value of the destination address for operations such as writing rendered data. Thus, unique addresses need not be generated for each VPU.