Multi-Wafer Stacking Structure Eliminates Silicon Substrate
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Solution Overview
Problem
Traditional multi-wafer stacking methods face limitations in thickness due to the need for lead bonding and silicon substrates, leading to increased costs and complexity, especially as the density of semiconductor development increases.
Innovation Solution
A multi-wafer stacking structure that eliminates the need for lead bonding and silicon substrates by using bonded dielectric layers and interconnection layers to connect wafers, reducing overall thickness and simplifying the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lead bonding is used to interconnect multiple wafers, then interconnection among wafers is achieved, but the overall thickness increases due to required lead space and silicon substrate thickness
Solution Approach 1:
The patent extracts and eliminates the lead bonding process and silicon substrate from the multi-wafer stacking structure. Instead of using traditional leads and silicon substrates, the invention directly bonds semiconductor wafers together through their bonding pads, removing the unnecessary intermediate components that increase thickness.
Solution Approach 2:
The patent merges the functions of the silicon substrate and lead interconnections into a direct wafer-to-wafer bonding structure. The bonding pads on each wafer directly connect to corresponding bonding pads on adjacent wafers, combining the substrate support function and interconnection function into a single integrated structure.
2Reliability
If traditional lead bonding method is adopted, then interconnection is realized, but the cost increases due to gold wire leads and complex substrate design
Solution Approach 1:
The patent replaces expensive gold wire leads with simpler, cheaper bonding pad structures that can be formed using standard semiconductor fabrication processes. The bonding pads are created as part of the normal wafer fabrication sequence, eliminating the need for separate expensive lead materials and complex substrate designs.
Solution Approach 2:
The patent replaces the mechanical lead bonding system with a direct electrical and mechanical bonding system using bonding pads. Instead of using separate lead wires that require mechanical attachment, the electrical connections are formed through direct contact between bonding pads during wafer bonding.
3Reliability
If silicon substrate with sharing bonding pads is used, then multi-wafer interconnection is achieved, but the structure cannot adapt to high-density requirements
Solution Approach 1:
The patent segments the interconnection function from the substrate function. Each wafer maintains its own bonding pads for interconnection, eliminating the need for a separate silicon substrate with sharing bonding pads. This segmentation allows each wafer to be independently optimized for high-density configurations.
Solution Approach 2:
The patent transitions from a planar substrate-based interconnection approach to a vertical stacking approach where wafers are bonded face-to-face. This dimensional change enables higher density by utilizing the vertical axis for stacking multiple wafers without requiring lateral expansion of bonding pad areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the overall thickness of the stacked device, increases packaging density, and lowers costs by eliminating the need for leads and complex substrate designs, while enabling higher wafer integration and thinner semiconductor products.
Implementation Method 1
a first dielectric layer and a second dielectric layer, the first dielectric layer and the second dielectric layer being bonded to each other
Data Source
AI summary
A multi-wafer stacking structure and a fabrication method thereof are disclosed. A first dielectric layer and a second dielectric layer are bonded to each other, a first interconnection layer is electrically connected with a second metal layer and a first metal layer via a first opening; a third dielectric layer and an insulating layer are bonded to each other, and a second interconnection layer is electrically connected with a third metal layer and the first interconnection layer via a second opening. Reservation of a pressure welding lead space among wafers is not needed, a silicon substrate is omitted, multi-wafer stacking thickness is reduced while interconnection of multiple pieces of wafers is realized, and therefore, the overall thickness of the device after multi-wafer stacking and packaging is reduced, packaging density is increased, and the requirement of thinning of the semiconductor products is met.