Multi-Width ECC Circuitry Using Fixed-Width Encoding

Solution Overview

Problem

Existing memory interface circuitry for programmable logic devices like FPGAs faces inefficiencies due to the need to support multiple data widths, leading to increased silicon area and power consumption when using separate error correction code circuitries for each width, and inefficiencies in handling varying data widths.

Innovation Solution

Implementing a multi-width error correction code (ECC) circuitry with a single-width ECC encoder and decoder, accompanied by format converters to translate data into a fixed width, reducing silicon area and power consumption while supporting multiple data widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate error correction code circuitries are implemented for each data width, then each data width can be supported independently, but silicon area and power consumption increase

Engineering Contradiction:

Improvesupport for multiple data widthsVSAvoidsilicon area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a universal error correction code circuit that can handle multiple data widths (8-bit, 16-bit, 32-bit, 64-bit) through a single unified architecture. The circuit uses configurable parameters including data width selection signals and adjustable syndrome counter depths to adapt to different interface widths, eliminating the need for separate dedicated ECC circuits for each width while maintaining full error correction capability across all supported widths

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The error correction code circuit incorporates dynamic configuration capabilities where the data width parameter can be changed at runtime based on the active interface width. The syndrome counter depth and other circuit parameters are dynamically adjusted according to the selected data width, allowing the same physical circuit to efficiently serve multiple width requirements without being locked into a fixed configuration

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If separate error correction code circuitries are implemented for each data width, then each data width can be supported independently, but power consumption increases

Engineering Contradiction:

Improvesupport for multiple data widthsVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent implements a universal error correction code circuit that can handle multiple data widths (8-bit, 16-bit, 32-bit, 64-bit) through a single unified architecture. The circuit uses configurable parameters including data width selection signals and adjustable syndrome counter depths to adapt to different interface widths, eliminating the need for separate dedicated ECC circuits for each width while maintaining full error correction capability across all supported widths

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple separate error correction functions into a single integrated circuit block. By combining the error detection, syndrome calculation, and correction logic into one unified structure that can be configured for different widths, the design reduces total power consumption compared to having parallel separate circuits, as only one circuit instance needs to be active at any given time

Inventive Principle:

Principle #5Merging (Combining)

3Area of stationary object

If a single error correction code circuitry is implemented, then silicon area and power consumption are reduced, but handling varying data widths becomes complex

Engineering Contradiction:

Improvesilicon areaVSAvoidhandling varying data widths

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The error correction code circuit incorporates dynamic configuration capabilities where the data width parameter can be changed at runtime based on the active interface width. The syndrome counter depth and other circuit parameters are dynamically adjusted according to the selected data width, allowing the same physical circuit to efficiently serve multiple width requirements without being locked into a fixed configuration

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent introduces width selection logic and configuration interfaces that act as intermediaries between the variable data width requirements and the fixed-width processing core. These intermediary components manage the translation and adaptation of different width inputs to the unified error correction circuit, simplifying the overall control logic while maintaining flexibility

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12009842B2Error correcting code circuitry compatible with multi-width interfaces

Publication Date: 2024.06.11 ALTERA CORP

AI summary

Systems and methods described herein may relate to providing a dynamically configurable error correction code (ECC) circuitry able to process data having one of a variety of widths. This multi-width ECC circuitry may generate error correction code bits (ECC bits) using, for example, an encoder or a decoder characterized by a fixed data width. Translation circuitry (e.g., a format converter) may translate data received from data utilization circuitry between a data width used by the data utilization circuitry and the fixed data width used by the encoder or the decoder.