Multi-Wire PHY Circuitry With Shielding for Dual MIPI Modes

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Solution Overview

Problem

Mobile devices require integrated circuits that can seamlessly interface with both MIPI D-PHY and MIPI C-PHY specifications, as existing solutions are not adaptable to all components and requirements, necessitating a solution that supports different PHY modes with varying signaling characteristics.

Innovation Solution

The development of physical layer circuitry (PHY) and multi-signal physical medium attachment sublayer (PMA) that can be configured to support both MIPI D-PHY and MIPI C-PHY modes, utilizing adjustable resistive elements and switch-controlled termination circuits to adapt to different PHY modes, and incorporating shielding pads to reduce interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate integrated circuits are designed for MIPI D-PHY and MIPI C-PHY specifications, then each circuit can be optimized for its specific signaling characteristics, but device complexity and area usage increase

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidcircuit configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal PHY circuit that can operate in both MIPI D-PHY and MIPI C-PHY modes by incorporating mode selection logic and configurable termination circuits. The circuit includes a first mode for D-PHY operation with differential signaling and a second mode for C-PHY operation with three-wire signaling, allowing a single integrated circuit to replace multiple specialized circuits while maintaining optimization for each mode through software-controlled configuration

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a universal PHY circuit supports both MIPI D-PHY and MIPI C-PHY modes, then device area is reduced and compatibility improves, but circuit design complexity increases

Engineering Contradiction:
ImprovePHY mode compatibilityVSAvoidcircuit design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic reconfiguration capabilities where the PHY circuit can switch between D-PHY and C-PHY modes based on operational requirements. The circuit includes dynamic termination control that adjusts impedance matching differentially for each mode, and configurable signal routing that adapts the physical layer interface according to the selected PHY type, enabling a single circuit to maintain low complexity while supporting multiple modes

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The universal PHY circuit is segmented into independent functional blocks including a mode selection module, a D-PHY specific processing block, a C-PHY specific processing block, and a shared higher-layer processing block. This segmentation allows each mode-specific block to be optimized independently while sharing common infrastructure, reducing overall design complexity compared to a fully integrated monolithic design

Inventive Principle:
Principle #1Segmentation

3Object-affected harmful factors

If shielding pads are added to reduce interference, then signal quality improves, but device area increases

Engineering Contradiction:
Improvesignal interferenceVSAvoiddevice area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent introduces shielding pads as intermediary elements positioned between signal transmission lines and external environment. These shielding pads act as electromagnetic barriers that intercept and redirect interference before it reaches sensitive signal lines, effectively reducing signal quality degradation while using minimal area compared to more extensive shielding approaches

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10574431B2Physical layer circuitry for multi-wire interface
Publication Date: 2020.02.25 M31 TECH
  • US10574431B2 patent drawing
  • US10574431B2 patent drawing
  • US10574431B2 patent drawing

AI summary

A physical layer circuitry (PHY) includes: N signal pads, a four-signal physical medium attachment sublayer (PMA) and M shielding pads. The N signal pads include at least four signal pads. The four-signal PMA is coupled to the four signal pads. The M shielding pads include at least one first shielding pad that is coupled to the four-signal PMA. Additionally, the first shielding pin is located between a second signal pad of the four signal pads and a third signal pad of the four signal pads; and M and N are positive integers.