Multi-Write Memory Feedback Loop for Faster State Updates

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Solution Overview

Problem

Conventional memory circuits require a longer time to secure a new state due to the sequential propagation of input signals through feedback loops, which affects their performance and power efficiency.

Innovation Solution

The introduction of additional elements such as inverters and three-state inverters in the state-storage feedback loop allows for parallel propagation of data inputs at multiple points, reducing the time needed to update the feedback loop and achieve a new state, thereby enhancing the speed and reducing the minimum retention voltage (Vmin).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data is propagated sequentially through the feedback loop at a single point, then the circuit structure is simple, but the time required to secure a new state is increased

Engineering Contradiction:

Improvetime to secure new stateVSAvoidfeedback loop structure

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The feedback loop is segmented into multiple propagation paths with data input introduced at multiple different points around the loop. This allows parallel propagation of data through different segments of the feedback loop, reducing the overall time required to secure a new state while maintaining circuit functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from single-point sequential data propagation to multi-point parallel propagation by introducing data at multiple locations around the feedback loop. This dimensional change from one propagation path to multiple paths enables simultaneous updating of different portions of the feedback loop.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Speed

If additional elements are added to enable parallel propagation, then the speed is improved, but the device complexity increases

Engineering Contradiction:

Improvestate update speedVSAvoidcircuit elements

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The feedback loop is divided into multiple segments with data input available at different points. Each segment can be updated in parallel, improving speed without requiring complete redesign of the entire circuit. The segmentation allows incremental improvements while controlling overall complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The feedback loop structure is designed to serve multiple functions: it maintains state storage capability while simultaneously enabling parallel data propagation through multiple entry points. This multi-functionality allows the same basic structure to achieve both speed improvement and state retention.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If parallel propagation is implemented, then the minimum retention voltage is reduced, but the circuit design becomes more complex

Engineering Contradiction:

Improveminimum retention voltageVSAvoidcircuit design

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The feedback loop is segmented into multiple propagation paths with data input introduced at different points. This segmentation enables parallel updating of loop segments, reducing the minimum retention voltage requirement while distributing the design complexity across manageable segments rather than requiring complete redesign.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS7592836B1Multi-write memory circuit with multiple data inputs

Publication Date: 2009.09.22 INTELLECTUAL VENTURES HOLDING 81 LLC

AI summary

Various types of memory circuits are described. A memory circuit may include a state-storage feedback loop coupled to a first data input and to a second data input. The first data input is introduced into the feedback loop at a first set of points, and the second data input is introduced into the feedback loop at a second set of points.