Multi-Write Memory Circuit with Parallel Feedback Loop Updating

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Solution Overview

Problem

Conventional memory circuits require longer time to secure a new state due to sequential updating of the feedback loop, which affects their performance and power efficiency.

Innovation Solution

Introducing a data input at multiple points in the state-storage feedback loop, allowing parallel propagation and updating the loop in fewer inversions, thereby reducing the time needed to secure a new state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data input is introduced at a single point in the feedback loop, then the circuit structure is simple, but the time required to update the feedback loop is longer

Engineering Contradiction:

Improvetime required to update feedback loopVSAvoidcircuit structure complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The feedback loop is segmented into multiple sections with data input introduced at multiple points throughout the loop. This allows different segments of the feedback loop to be updated in parallel, reducing the total time required for a complete loop update while maintaining manageable circuit complexity through modular organization.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The single-point sequential data input approach is transformed into a multi-point parallel data input approach. By adding the spatial dimension of multiple input points around the feedback loop, the circuit achieves parallel propagation of data signals, thereby reducing update time without proportionally increasing complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If the feedback loop is updated sequentially, then the circuit design is straightforward, but the performance and power efficiency are reduced

Engineering Contradiction:

Improveperformance and power efficiencyVSAvoidfeedback loop structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The feedback loop is divided into multiple segments with separate data input points, enabling parallel operation of different loop sections. This segmentation improves productivity by allowing simultaneous state updates across multiple segments, reducing overall update time and improving power efficiency through parallel processing.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

By introducing data input at multiple points, the circuit maintains continuous useful action throughout the feedback loop rather than waiting for sequential propagation. Multiple parallel paths ensure that state updates occur continuously and simultaneously across different loop sections, maximizing productivity.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS8067970B2Multi-write memory circuit with a data input and a clock input

Publication Date: 2011.11.29 INTELLECTUAL VENTURES HOLDING 81 LLC

AI summary

Various types of memory circuits are described. A memory circuit may include a state-storage feedback loop coupled to a clock input and to a data input. The data input is introduced into the feedback loop at multiple points, and propagated in parallel from those points to other points in the feedback loop.