Multi-Band Frequency Conversion for Low-Power High-Speed SERDES
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Solution Overview
Problem
High-speed data transmission in semiconductor chips is hindered by power consumption limitations, particularly in SERDES devices, where increasing operation speed leads to signal attenuation and increased power consumption, making it difficult to maintain efficient data processing.
Innovation Solution
A one-chip semiconductor chip with multiple frequency converters that perform frequency conversion of input signals into different frequency bands, combining these signals to output a composite signal, allowing for high-speed data transmission while minimizing power consumption by distributing converted signals effectively across multiple converters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operation speed of the SERDES is increased to achieve high-speed data transmission, then the data transmission speed is improved, but the power consumption is increased and signal attenuation becomes large
Solution Approach 1:
The patent divides the single high-speed serial data stream into multiple parallel lower-speed data streams. Each parallel stream is processed by a separate frequency converter operating at a lower clock frequency, thereby reducing power consumption while maintaining overall high data transmission throughput through parallel processing
Solution Approach 2:
The patent transitions from a single-dimensional high-speed serial transmission approach to a multi-dimensional parallel processing architecture. By distributing data across multiple frequency converters operating in parallel at lower frequencies, the system achieves high overall transmission speed while each individual component operates more efficiently with lower power consumption
2Speed
If the operation speed of the SERDES is increased to achieve high-speed data transmission, then the data transmission speed is improved, but signal attenuation becomes large making impedance matching difficult
Solution Approach 1:
The patent segments the high-frequency signal into multiple lower-frequency parallel signals, each processed by a separate frequency converter. This segmentation reduces signal attenuation and impedance matching difficulties for each individual signal path while maintaining overall high data transmission capability through parallel combination of the processed signals
Solution Approach 2:
The patent moves from a single high-frequency signal path to multiple lower-frequency parallel signal paths. This dimensional transition allows each signal path to operate with better signal quality and less attenuation, while the parallel architecture maintains the overall high-speed data transmission performance
3Speed
If data transmission is performed in parallel to achieve high speed, then the data transmission speed is improved, but the number of wiring lines and pins is increased
Solution Approach 1:
The patent combines multiple parallel lower-speed data streams into a single high-speed transmission channel through frequency multiplexing. The multiple frequency converters process parallel data streams and combine them into one composite signal that can be transmitted through a single wiring line or pin, thereby maintaining high data transmission speed while reducing the number of required wiring lines
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables easy high-speed data transmission by processing data in multiple frequency bands without increasing the processing speed of serial data blocks, thus reducing power consumption and addressing signal attenuation issues.
Implementation Method 1
a plurality of frequency converters that perform frequency conversion of input signals to output converted signals are formed
Implementation Method 2
the converted signals output from the plurality of frequency converters are combined to output a composite signal
Data Source
AI summary
A signal processor includes: a plurality of frequency converters which perform frequency conversion of input signals to output converted signals; and an output section which combines the converted signals output from the plurality of frequency converters and outputs a composite signal, wherein the plurality of frequency converters are formed in a one-chip semiconductor chip, and the plurality of frequency converters perform frequency conversion into converted signals in different frequency bands.


