Multi-Bit ADC Overcurrent Detection With Low-Latency Thresholding
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Solution Overview
Problem
Conventional overcurrent detection systems using 1-bit sigma delta modulator (SDM) ADCs suffer from high latency and accuracy issues due to the time-consuming conversion from high sampling frequency to low sampling frequency, and adding a comparator in parallel introduces errors and increased power consumption.
Innovation Solution
Implementing multi-bit ADCs that directly convert sensed current into a digital signal without additional hardware, enabling faster overcurrent detection with improved accuracy and reduced latency by eliminating the need for parallel comparators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a 1-bit sigma delta modulator (SDM) ADC is used for overcurrent detection, then the system can be implemented with simpler hardware, but the conversion from high sampling frequency to low sampling frequency introduces high latency and accuracy issues
Solution Approach 1:
The patent changes the fundamental parameter of the ADC from 1-bit to multi-bit resolution. This parameter change eliminates the need for oversampling and decimation filtering, thereby resolving the latency issue while maintaining hardware simplicity. The multi-bit ADC directly converts the analog current signal to a digital signal at the desired sampling rate without requiring frequency conversion.
2Speed
If a comparator is added in parallel to improve detection speed, then the response time is reduced, but errors increase and power consumption increases
Solution Approach 1:
The patent extracts and removes the parallel comparator component from the system. By using a multi-bit ADC that inherently provides fast conversion, the need for a separate comparator is eliminated. This removal of the comparator component eliminates the source of errors and reduced power consumption while maintaining fast detection speed through the ADC's direct conversion capability.
3Loss of time
If a parallel comparator is added to reduce detection latency, then the response time improves, but power consumption increases
Solution Approach 1:
The patent removes the power-consuming parallel comparator from the system architecture. The multi-bit ADC provides fast conversion natively, eliminating the need for additional active components. This extraction of the comparator component directly reduces power consumption while maintaining low latency through the ADC's inherent fast conversion capability.
4Measurement precision
If multi-bit ADC is used for overcurrent detection, then detection accuracy and speed are improved, but the device complexity increases
Solution Approach 1:
The patent applies parameter change by increasing the ADC resolution from 1-bit to multi-bit. This parameter change improves measurement precision and eliminates the need for complex post-processing circuits like decimation filters and parallel comparators. The overall system complexity is reduced despite the higher ADC resolution because the multi-bit ADC integrates multiple functions that would otherwise require separate components.
Data Source
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AI summary
The techniques described herein relate to overcurrent detection with multi-bit analog-to-digital converters (ADCs). An example apparatus includes a multi-bit analog-to-digital converter (ADC) configured to convert an analog signal into a multi-bit digital signal. The example apparatus further includes a threshold detector configured to generate an output signal indicative of an overcurrent condition after a detection of at least a first number of bits of the multi-bit digital signal satisfying a threshold.