Multibit Code Communication via Resistive Divider Network
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Solution Overview
Problem
Existing multibit code communication methods require a large number of pins to represent and communicate data, which is impractical or undesirable in applications such as high-temperature environments or stringent certification requirements, where EEPROMs may fail or be inappropriate.
Innovation Solution
A system and method utilizing a multi-tap resistive divider network and decoder circuit to generate multiple voltage levels, allowing more than one bit to be represented per pin, enabling efficient communication of device IDs with reduced pin count through a single input pin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple pins are used to represent each bit of multibit code, then device identification capability is improved, but the number of pins required increases significantly
Solution Approach 1:
The patent changes the parameter representation from discrete pin states (one pin per bit) to continuous voltage level representation (multiple bits per pin). By using a multi-tap resistive divider network, the system generates multiple distinct voltage levels that can be compared by comparator circuits to determine multiple bits of device identification data from a single pin, thereby reducing pin count while maintaining identification capability
Solution Approach 2:
The patent transitions from a one-dimensional representation (one pin per bit) to a multi-dimensional approach where a single pin carries multiple bits of information through multiple voltage levels. The multi-tap resistive divider network creates multiple voltage thresholds, and the comparator circuit evaluates the input voltage against these thresholds to extract multiple bits from one pin, effectively adding dimensional complexity to the signal representation
2Ease of operation
If EEPROM is used to store multibit code, then device identification is simplified, but reliability deteriorates in high-temperature applications
Solution Approach 1:
The patent replaces the expensive, temperature-sensitive EEPROM storage with a simpler, more robust resistive divider network and comparator circuitry. The resistive elements and comparators are designed to operate reliably in high-temperature environments, sacrificing the programmability and ease of updating of EEPROM in exchange for superior temperature reliability and simpler hardware
Solution Approach 2:
The patent substitutes the electronic memory storage system (EEPROM) with an analog voltage-based identification system using resistive dividers and comparators. This mechanical/electrical substitution eliminates the need for complex memory circuits that are sensitive to temperature, replacing them with passive resistive elements and comparator circuits that maintain reliability in high-temperature applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of pins required for data representation, enhancing reliability and practicality in applications where traditional methods are unsuitable, while maintaining accurate device identification and compensation capabilities.
Implementation Method 1
a multi-tap resistive divider network comprising: three or more resistive elements configured in series; wherein a first end of the multi-tap resistive divider network is configured to be coupled to a first voltage and a second end of the multi-tap resistive divider network is configured to be coupled to a ground; a plurality of divider taps defined by the three or more resistive elements, each divider tap of the plurality of divider taps configured to generate a corresponding voltage level
Implementation Method 2
one or more comparators in communication with the input pin; a decoder circuit in communication with the one or more comparators, the decoder circuit configured to identify the device based at least in part on a comparison of an input voltage at the input pin and the voltage levels generated by the multi-tap resistive divider network
Data Source
AI summary
Certain implementations of the disclosed technology may include systems and methods for multibit code communications that can provide more than one bit per input port. In an example implementation, a method is provided that can include measuring an input voltage at an input port in communication with a device. The method can include comparing the measured input voltage with a plurality of predetermined reference voltage levels, and determining, based on the comparing, a device ID. The method can further include outputting the device ID. Certain implementations may further include compensating a signal associated with the device based on the identified device ID.


